diff options
| author | Len Brown <len.brown@intel.com> | 2005-12-06 17:31:30 -0500 |
|---|---|---|
| committer | Len Brown <len.brown@intel.com> | 2005-12-06 17:31:30 -0500 |
| commit | 3d5271f9883cba7b54762bc4fe027d4172f06db7 (patch) | |
| tree | ab8a881a14478598a0c8bda0d26c62cdccfffd6d /arch/sparc64/lib/VISsave.S | |
| parent | 378b2556f4e09fa6f87ff0cb5c4395ff28257d02 (diff) | |
| parent | 9115a6c787596e687df03010d97fccc5e0762506 (diff) | |
Pull release into acpica branch
Diffstat (limited to 'arch/sparc64/lib/VISsave.S')
| -rw-r--r-- | arch/sparc64/lib/VISsave.S | 8 |
1 files changed, 5 insertions, 3 deletions
diff --git a/arch/sparc64/lib/VISsave.S b/arch/sparc64/lib/VISsave.S index 4e18989bd60..a0ded5c5aa5 100644 --- a/arch/sparc64/lib/VISsave.S +++ b/arch/sparc64/lib/VISsave.S @@ -59,15 +59,17 @@ vis1: ldub [%g6 + TI_FPSAVED], %g3 be,pn %icc, 9b add %g6, TI_FPREGS, %g2 andcc %o5, FPRS_DL, %g0 - membar #StoreStore | #LoadStore be,pn %icc, 4f add %g6, TI_FPREGS+0x40, %g3 + membar #Sync stda %f0, [%g2 + %g1] ASI_BLK_P stda %f16, [%g3 + %g1] ASI_BLK_P + membar #Sync andcc %o5, FPRS_DU, %g0 be,pn %icc, 5f 4: add %g1, 128, %g1 + membar #Sync stda %f32, [%g2 + %g1] ASI_BLK_P stda %f48, [%g3 + %g1] ASI_BLK_P @@ -87,7 +89,7 @@ vis1: ldub [%g6 + TI_FPSAVED], %g3 sll %g1, 5, %g1 add %g6, TI_FPREGS+0xc0, %g3 wr %g0, FPRS_FEF, %fprs - membar #StoreStore | #LoadStore + membar #Sync stda %f32, [%g2 + %g1] ASI_BLK_P stda %f48, [%g3 + %g1] ASI_BLK_P membar #Sync @@ -128,8 +130,8 @@ VISenterhalf: be,pn %icc, 4f add %g6, TI_FPREGS, %g2 - membar #StoreStore | #LoadStore add %g6, TI_FPREGS+0x40, %g3 + membar #Sync stda %f0, [%g2 + %g1] ASI_BLK_P stda %f16, [%g3 + %g1] ASI_BLK_P membar #Sync |