summaryrefslogtreecommitdiffstats
path: root/arch/sparc64
diff options
context:
space:
mode:
authorDavid S. Miller <davem@sunset.davemloft.net>2006-03-01 22:42:18 -0800
committerDavid S. Miller <davem@sunset.davemloft.net>2006-03-20 01:14:13 -0800
commit45f791eb0f03e760183d30d3f1f18dc2b8e902fe (patch)
tree05ef47c68b45202106b70c1f28d4935a2c6115fb /arch/sparc64
parent92daa77e9a829350fd3900ff58d9c69820ad0e3d (diff)
[SPARC64]: Fix _PAGE_EXEC handling.
First of all, use the known _PAGE_EXEC_{4U,4V} value instead of loading _PAGE_EXEC from memory. We either know which one to use by context, or we can code patch the test. Next, we need to check executability of a PTE in the generic TSB miss handler. Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'arch/sparc64')
-rw-r--r--arch/sparc64/kernel/itlb_miss.S10
-rw-r--r--arch/sparc64/kernel/sun4v_tlb_miss.S4
-rw-r--r--arch/sparc64/kernel/tsb.S9
3 files changed, 15 insertions, 8 deletions
diff --git a/arch/sparc64/kernel/itlb_miss.S b/arch/sparc64/kernel/itlb_miss.S
index 6dfe3968c37..ad46e2024f4 100644
--- a/arch/sparc64/kernel/itlb_miss.S
+++ b/arch/sparc64/kernel/itlb_miss.S
@@ -9,18 +9,18 @@
cmp %g4, %g6 ! Compare TAG
/* ITLB ** ICACHE line 2: TSB compare and TLB load */
- sethi %hi(PAGE_EXEC), %g4 ! Setup exec check
- ldx [%g4 + %lo(PAGE_EXEC)], %g4
bne,pn %xcc, tsb_miss_itlb ! Miss
mov FAULT_CODE_ITLB, %g3
- andcc %g5, %g4, %g0 ! Executable?
+ andcc %g5, _PAGE_EXEC_4U, %g0 ! Executable?
be,pn %xcc, tsb_do_fault
nop ! Delay slot, fill me
+ stxa %g5, [%g0] ASI_ITLB_DATA_IN ! Load TLB
+ retry ! Trap done
nop
/* ITLB ** ICACHE line 3: */
- stxa %g5, [%g0] ASI_ITLB_DATA_IN ! Load TLB
- retry ! Trap done
+ nop
+ nop
nop
nop
nop
diff --git a/arch/sparc64/kernel/sun4v_tlb_miss.S b/arch/sparc64/kernel/sun4v_tlb_miss.S
index 3dccbd67818..3eed8db9684 100644
--- a/arch/sparc64/kernel/sun4v_tlb_miss.S
+++ b/arch/sparc64/kernel/sun4v_tlb_miss.S
@@ -58,11 +58,9 @@ sun4v_itlb_miss:
/* Load TSB tag/pte into %g2/%g3 and compare the tag. */
ldda [%g1] ASI_QUAD_LDD_PHYS_4V, %g2
cmp %g2, %g6
- sethi %hi(PAGE_EXEC), %g7
- ldx [%g7 + %lo(PAGE_EXEC)], %g7
bne,a,pn %xcc, tsb_miss_page_table_walk
mov FAULT_CODE_ITLB, %g3
- andcc %g3, %g7, %g0
+ andcc %g3, _PAGE_EXEC_4V, %g0
be,a,pn %xcc, tsb_do_fault
mov FAULT_CODE_ITLB, %g3
diff --git a/arch/sparc64/kernel/tsb.S b/arch/sparc64/kernel/tsb.S
index cc225c0563c..563852bf359 100644
--- a/arch/sparc64/kernel/tsb.S
+++ b/arch/sparc64/kernel/tsb.S
@@ -103,6 +103,15 @@ tsb_dtlb_load:
mov %g5, %g3
tsb_itlb_load:
+ /* Executable bit must be set. */
+661: andcc %g5, _PAGE_EXEC_4U, %g0
+ .section .sun4v_1insn_patch, "ax"
+ .word 661b
+ andcc %g5, _PAGE_EXEC_4V, %g0
+ .previous
+
+ be,pn %xcc, tsb_do_fault
+ nop
661: stxa %g5, [%g0] ASI_ITLB_DATA_IN
retry