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authorChris Metcalf <cmetcalf@tilera.com>2010-08-13 08:52:19 -0400
committerChris Metcalf <cmetcalf@tilera.com>2010-08-13 08:52:19 -0400
commitc745a8a11fa1df6078bfc61fc29492ed43f71c2b (patch)
tree2db1cdf9cd0d0e892f4f92de1fd2700ac319f04a /arch/tile/include/asm/atomic_32.h
parent1fcbe027b5d29ec9cd0eeb753c14fb366ae852ac (diff)
arch/tile: Various cleanups.
This change rolls up random cleanups not representing any actual bugs. - Remove a stale CONFIG_ value from the default tile_defconfig - Remove unused tns_atomic_xxx() family of methods from <asm/atomic.h> - Optimize get_order() using Tile's "clz" instruction - Fix a bad hypervisor upcall name (not currently used in Linux anyway) - Use __copy_in_user_inatomic() name for consistency, and export it - Export some additional hypervisor driver I/O upcalls and some homecache calls - Remove the obfuscating MEMCPY_TEST_WH64 support code - Other stray comment cleanups, #if 0 removal, etc. Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
Diffstat (limited to 'arch/tile/include/asm/atomic_32.h')
-rw-r--r--arch/tile/include/asm/atomic_32.h37
1 files changed, 0 insertions, 37 deletions
diff --git a/arch/tile/include/asm/atomic_32.h b/arch/tile/include/asm/atomic_32.h
index 40a5a3a876d..ed359aee883 100644
--- a/arch/tile/include/asm/atomic_32.h
+++ b/arch/tile/include/asm/atomic_32.h
@@ -255,43 +255,6 @@ static inline void atomic64_set(atomic64_t *v, u64 n)
#define smp_mb__after_atomic_dec() do { } while (0)
#define smp_mb__after_atomic_inc() do { } while (0)
-
-/*
- * Support "tns" atomic integers. These are atomic integers that can
- * hold any value but "1". They are more efficient than regular atomic
- * operations because the "lock" (aka acquire) step is a single "tns"
- * in the uncontended case, and the "unlock" (aka release) step is a
- * single "store" without an mf. (However, note that on tilepro the
- * "tns" will evict the local cache line, so it's not all upside.)
- *
- * Note that you can ONLY observe the value stored in the pointer
- * using these operations; a direct read of the value may confusingly
- * return the special value "1".
- */
-
-int __tns_atomic_acquire(atomic_t *);
-void __tns_atomic_release(atomic_t *p, int v);
-
-static inline void tns_atomic_set(atomic_t *v, int i)
-{
- __tns_atomic_acquire(v);
- __tns_atomic_release(v, i);
-}
-
-static inline int tns_atomic_cmpxchg(atomic_t *v, int o, int n)
-{
- int ret = __tns_atomic_acquire(v);
- __tns_atomic_release(v, (ret == o) ? n : ret);
- return ret;
-}
-
-static inline int tns_atomic_xchg(atomic_t *v, int n)
-{
- int ret = __tns_atomic_acquire(v);
- __tns_atomic_release(v, n);
- return ret;
-}
-
#endif /* !__ASSEMBLY__ */
/*