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authorWill Deacon <will.deacon@arm.com>2013-09-04 11:34:08 +0100
committerWill Deacon <will.deacon@arm.com>2014-10-20 18:49:18 +0100
commit1191ccb34cf810a0fefaaf5ca3cfe3c5d7675927 (patch)
tree1700dadabaaa2d658fa0c34580edd6c99e0bb205 /arch/tile/include
parent5da590574cbc39e48d1b71d87b62766c044b9b52 (diff)
sparc: io: implement dummy relaxed accessor macros for writes
write{b,w,l,q}_relaxed are implemented by some architectures in order to permit memory-mapped I/O accesses with weaker barrier semantics than the non-relaxed variants. This patch adds dummy macros for the write accessors to sparc, in the same vein as the dummy definitions for the relaxed read accessors. The existing relaxed read{b,w,l} accessors are moved into asm/io.h, since they are identical between 32-bit and 64-bit machines. Acked-by: "David S. Miller" <davem@davemloft.net> Acked-by: Sam Ravnborg <sam@ravnborg.org> Signed-off-by: Will Deacon <will.deacon@arm.com>
Diffstat (limited to 'arch/tile/include')
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