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| author | Ingo Molnar <mingo@elte.hu> | 2008-10-27 10:50:54 +0100 |
|---|---|---|
| committer | Ingo Molnar <mingo@elte.hu> | 2008-10-27 10:50:54 +0100 |
| commit | 4944dd62de21230af039eda7cd218e9a09021d11 (patch) | |
| tree | bac70f7bab8506c7e1b0408bacbdb0b1d77262e9 /arch/x86/include/asm/cache.h | |
| parent | f17845e5d97ead8fbdadfd40039e058ec7cf4a42 (diff) | |
| parent | 0173a3265b228da319ceb9c1ec6a5682fd1b2d92 (diff) | |
Merge commit 'v2.6.28-rc2' into tracing/urgent
Diffstat (limited to 'arch/x86/include/asm/cache.h')
| -rw-r--r-- | arch/x86/include/asm/cache.h | 20 |
1 files changed, 20 insertions, 0 deletions
diff --git a/arch/x86/include/asm/cache.h b/arch/x86/include/asm/cache.h new file mode 100644 index 00000000000..5d367caa0e3 --- /dev/null +++ b/arch/x86/include/asm/cache.h @@ -0,0 +1,20 @@ +#ifndef _ASM_X86_CACHE_H +#define _ASM_X86_CACHE_H + +/* L1 cache line size */ +#define L1_CACHE_SHIFT (CONFIG_X86_L1_CACHE_SHIFT) +#define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT) + +#define __read_mostly __attribute__((__section__(".data.read_mostly"))) + +#ifdef CONFIG_X86_VSMP +/* vSMP Internode cacheline shift */ +#define INTERNODE_CACHE_SHIFT (12) +#ifdef CONFIG_SMP +#define __cacheline_aligned_in_smp \ + __attribute__((__aligned__(1 << (INTERNODE_CACHE_SHIFT)))) \ + __attribute__((__section__(".data.page_aligned"))) +#endif +#endif + +#endif /* _ASM_X86_CACHE_H */ |