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authorThomas Gleixner <tglx@linutronix.de>2010-10-12 16:39:44 +0200
committerThomas Gleixner <tglx@linutronix.de>2010-10-12 16:39:53 +0200
commit8ffcfa4e2d96342180e02dfe1230b97778c52d72 (patch)
tree77255a0235022444fe958ab1092fb352e6222b72 /arch/x86/include/asm/irq_remapping.h
parentb683de2b3cb17bb10fa6fd4af614dc75b5749fe0 (diff)
parentfa47f7e52874683a9659df2f1f143105f676dc0f (diff)
Merge branch 'x86/x2apic' into irq/sparseirq
Reason: Avoid conflicts with the x2apic modifications Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Diffstat (limited to 'arch/x86/include/asm/irq_remapping.h')
-rw-r--r--arch/x86/include/asm/irq_remapping.h27
1 files changed, 27 insertions, 0 deletions
diff --git a/arch/x86/include/asm/irq_remapping.h b/arch/x86/include/asm/irq_remapping.h
index f275e224450..8d841505344 100644
--- a/arch/x86/include/asm/irq_remapping.h
+++ b/arch/x86/include/asm/irq_remapping.h
@@ -3,4 +3,31 @@
#define IRTE_DEST(dest) ((x2apic_mode) ? dest : dest << 8)
+#ifdef CONFIG_INTR_REMAP
+static inline void prepare_irte(struct irte *irte, int vector,
+ unsigned int dest)
+{
+ memset(irte, 0, sizeof(*irte));
+
+ irte->present = 1;
+ irte->dst_mode = apic->irq_dest_mode;
+ /*
+ * Trigger mode in the IRTE will always be edge, and for IO-APIC, the
+ * actual level or edge trigger will be setup in the IO-APIC
+ * RTE. This will help simplify level triggered irq migration.
+ * For more details, see the comments (in io_apic.c) explainig IO-APIC
+ * irq migration in the presence of interrupt-remapping.
+ */
+ irte->trigger_mode = 0;
+ irte->dlvry_mode = apic->irq_delivery_mode;
+ irte->vector = vector;
+ irte->dest_id = IRTE_DEST(dest);
+ irte->redir_hint = 1;
+}
+#else
+static void prepare_irte(struct irte *irte, int vector, unsigned int dest)
+{
+}
+#endif
+
#endif /* _ASM_X86_IRQ_REMAPPING_H */