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author | Rafael J. Wysocki <rjw@sisk.pl> | 2009-09-14 20:26:05 +0200 |
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committer | Rafael J. Wysocki <rjw@sisk.pl> | 2009-09-14 20:26:05 +0200 |
commit | ac8d513a6801c8636922ccf4f30211810c9a56ce (patch) | |
tree | 83ba584487a6a612c8fcf2563c28c0263df35ba2 /arch/x86/include/asm/perf_counter.h | |
parent | bf992fa2bc1ad1bb2aeb0bdfadb43f236b9297fd (diff) | |
parent | 99bc47067910f7070e65ee318a6dd79a2371f1e5 (diff) |
Merge branch 'master' into for-linus
Diffstat (limited to 'arch/x86/include/asm/perf_counter.h')
-rw-r--r-- | arch/x86/include/asm/perf_counter.h | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/arch/x86/include/asm/perf_counter.h b/arch/x86/include/asm/perf_counter.h index fa64e401589..e7b7c938ae2 100644 --- a/arch/x86/include/asm/perf_counter.h +++ b/arch/x86/include/asm/perf_counter.h @@ -84,6 +84,16 @@ union cpuid10_edx { #define MSR_ARCH_PERFMON_FIXED_CTR2 0x30b #define X86_PMC_IDX_FIXED_BUS_CYCLES (X86_PMC_IDX_FIXED + 2) +/* + * We model BTS tracing as another fixed-mode PMC. + * + * We choose a value in the middle of the fixed counter range, since lower + * values are used by actual fixed counters and higher values are used + * to indicate other overflow conditions in the PERF_GLOBAL_STATUS msr. + */ +#define X86_PMC_IDX_FIXED_BTS (X86_PMC_IDX_FIXED + 16) + + #ifdef CONFIG_PERF_COUNTERS extern void init_hw_perf_counters(void); extern void perf_counters_lapic_init(void); |