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| author | H. Peter Anvin <hpa@zytor.com> | 2008-10-22 22:26:29 -0700 |
|---|---|---|
| committer | H. Peter Anvin <hpa@zytor.com> | 2008-10-22 22:55:23 -0700 |
| commit | 1965aae3c98397aad957412413c07e97b1bd4e64 (patch) | |
| tree | 1386fcb54753f8dda8f99ca6e5ecab0add1f029f /arch/x86/include/asm/pgtable-3level.h | |
| parent | 87e299e5c7508a9443f04703f1d0c7f518f79ea9 (diff) | |
x86: Fix ASM_X86__ header guards
Change header guards named "ASM_X86__*" to "_ASM_X86_*" since:
a. the double underscore is ugly and pointless.
b. no leading underscore violates namespace constraints.
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
Diffstat (limited to 'arch/x86/include/asm/pgtable-3level.h')
| -rw-r--r-- | arch/x86/include/asm/pgtable-3level.h | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/arch/x86/include/asm/pgtable-3level.h b/arch/x86/include/asm/pgtable-3level.h index 75f4276b5dd..fb16cec702e 100644 --- a/arch/x86/include/asm/pgtable-3level.h +++ b/arch/x86/include/asm/pgtable-3level.h @@ -1,5 +1,5 @@ -#ifndef ASM_X86__PGTABLE_3LEVEL_H -#define ASM_X86__PGTABLE_3LEVEL_H +#ifndef _ASM_X86_PGTABLE_3LEVEL_H +#define _ASM_X86_PGTABLE_3LEVEL_H /* * Intel Physical Address Extension (PAE) Mode - three-level page @@ -172,4 +172,4 @@ static inline int pte_none(pte_t pte) #define __pte_to_swp_entry(pte) ((swp_entry_t){ (pte).pte_high }) #define __swp_entry_to_pte(x) ((pte_t){ { .pte_high = (x).val } }) -#endif /* ASM_X86__PGTABLE_3LEVEL_H */ +#endif /* _ASM_X86_PGTABLE_3LEVEL_H */ |