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authorH. Peter Anvin <hpa@linux.intel.com>2013-06-28 15:26:17 -0700
committerH. Peter Anvin <hpa@linux.intel.com>2013-06-28 15:26:17 -0700
commit9f84b6267ccde1bebe3f9cd40a91716b5ece5e20 (patch)
treeb51dcf9fb1b7205ed8134ad1169e73719897163d /arch/x86/include/asm/processor.h
parent719038de98bc8479b771c582a1e4a1e86079da22 (diff)
parent5f8c4218148822fde6eebbeefc34bd0a6061e031 (diff)
Merge remote-tracking branch 'origin/x86/fpu' into queue/x86/cpu
Use the union of 3.10 x86/cpu and x86/fpu as baseline. Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
Diffstat (limited to 'arch/x86/include/asm/processor.h')
-rw-r--r--arch/x86/include/asm/processor.h3
1 files changed, 2 insertions, 1 deletions
diff --git a/arch/x86/include/asm/processor.h b/arch/x86/include/asm/processor.h
index 5b87d52eed0..29937c4f6ff 100644
--- a/arch/x86/include/asm/processor.h
+++ b/arch/x86/include/asm/processor.h
@@ -89,9 +89,9 @@ struct cpuinfo_x86 {
char wp_works_ok; /* It doesn't on 386's */
/* Problems on some 486Dx4's and old 386's: */
- char hard_math;
char rfu;
char pad0;
+ char pad1;
#else
/* Number of 4K pages in DTLB/ITLB combined(in pages): */
int x86_tlbsize;
@@ -164,6 +164,7 @@ extern const struct seq_operations cpuinfo_op;
#define cache_line_size() (boot_cpu_data.x86_cache_alignment)
extern void cpu_detect(struct cpuinfo_x86 *c);
+extern void __cpuinit fpu_detect(struct cpuinfo_x86 *c);
extern void early_cpu_init(void);
extern void identify_boot_cpu(void);