diff options
| author | Simon Arlott <simon@fire.lp0.eu> | 2007-10-20 01:13:56 +0200 |
|---|---|---|
| committer | Adrian Bunk <bunk@kernel.org> | 2007-10-20 01:13:56 +0200 |
| commit | 27b46d7661dc720224813eb4f452e424f1bf3a9a (patch) | |
| tree | 1683daefc5f245efa5a1c2a3808277b45d21ce72 /arch/x86/kernel/acpi | |
| parent | 5e71c6051585da46b898b21bd8e5b6df2795f03f (diff) | |
spelling fixes: arch/i386/
Spelling fixes in arch/i386/.
Signed-off-by: Simon Arlott <simon@fire.lp0.eu>
Signed-off-by: Adrian Bunk <bunk@kernel.org>
Diffstat (limited to 'arch/x86/kernel/acpi')
| -rw-r--r-- | arch/x86/kernel/acpi/boot.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/arch/x86/kernel/acpi/boot.c b/arch/x86/kernel/acpi/boot.c index afd2afe9102..25337f2b739 100644 --- a/arch/x86/kernel/acpi/boot.c +++ b/arch/x86/kernel/acpi/boot.c @@ -99,7 +99,7 @@ static u64 acpi_lapic_addr __initdata = APIC_DEFAULT_PHYS_BASE; /* * The default interrupt routing model is PIC (8259). This gets - * overriden if IOAPICs are enumerated (below). + * overridden if IOAPICs are enumerated (below). */ enum acpi_irq_model_id acpi_irq_model = ACPI_IRQ_MODEL_PIC; @@ -414,8 +414,8 @@ acpi_parse_nmi_src(struct acpi_subtable_header * header, const unsigned long end * * Port 0x4d0-4d1 are ECLR1 and ECLR2, the Edge/Level Control Registers * for the 8259 PIC. bit[n] = 1 means irq[n] is Level, otherwise Edge. - * ECLR1 is IRQ's 0-7 (IRQ 0, 1, 2 must be 0) - * ECLR2 is IRQ's 8-15 (IRQ 8, 13 must be 0) + * ECLR1 is IRQs 0-7 (IRQ 0, 1, 2 must be 0) + * ECLR2 is IRQs 8-15 (IRQ 8, 13 must be 0) */ void __init acpi_pic_sci_set_trigger(unsigned int irq, u16 trigger) @@ -427,7 +427,7 @@ void __init acpi_pic_sci_set_trigger(unsigned int irq, u16 trigger) old = inb(0x4d0) | (inb(0x4d1) << 8); /* - * If we use ACPI to set PCI irq's, then we should clear ELCR + * If we use ACPI to set PCI IRQs, then we should clear ELCR * since we will set it correctly as we enable the PCI irq * routing. */ |