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authorSimon Arlott <simon@fire.lp0.eu>2007-10-20 01:13:56 +0200
committerAdrian Bunk <bunk@kernel.org>2007-10-20 01:13:56 +0200
commit27b46d7661dc720224813eb4f452e424f1bf3a9a (patch)
tree1683daefc5f245efa5a1c2a3808277b45d21ce72 /arch/x86/kernel/apic_32.c
parent5e71c6051585da46b898b21bd8e5b6df2795f03f (diff)
spelling fixes: arch/i386/
Spelling fixes in arch/i386/. Signed-off-by: Simon Arlott <simon@fire.lp0.eu> Signed-off-by: Adrian Bunk <bunk@kernel.org>
Diffstat (limited to 'arch/x86/kernel/apic_32.c')
-rw-r--r--arch/x86/kernel/apic_32.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/x86/kernel/apic_32.c b/arch/x86/kernel/apic_32.c
index 793341fffc8..08b07c17696 100644
--- a/arch/x86/kernel/apic_32.c
+++ b/arch/x86/kernel/apic_32.c
@@ -947,7 +947,7 @@ void __devinit setup_local_APIC(void)
* Set up LVT0, LVT1:
*
* set up through-local-APIC on the BP's LINT0. This is not
- * strictly necessery in pure symmetric-IO mode, but sometimes
+ * strictly necessary in pure symmetric-IO mode, but sometimes
* we delegate interrupts to the 8259A.
*/
/*
@@ -998,7 +998,7 @@ void __devinit setup_local_APIC(void)
} else {
if (esr_disable)
/*
- * Something untraceble is creating bad interrupts on
+ * Something untraceable is creating bad interrupts on
* secondary quads ... for the moment, just leave the
* ESR disabled - we can't do anything useful with the
* errors anyway - mbligh