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| author | Ingo Molnar <mingo@elte.hu> | 2009-06-20 10:54:22 +0200 |
|---|---|---|
| committer | Ingo Molnar <mingo@elte.hu> | 2009-06-20 10:54:22 +0200 |
| commit | 1d99100120ead486cd7a2502f19eaf1c1699d806 (patch) | |
| tree | e9b5157c93d365f107e341a81a6b5b3946ea1785 /arch/x86/kernel/cpu/mcheck/p5.c | |
| parent | bc3f5d3dbd576da94a575b1477b8e38551bf11da (diff) | |
| parent | b1f49f9582f9be6de5055cfa97eabf6246f2eaf7 (diff) | |
Merge branch 'x86/mce3' into x86/urgent
Diffstat (limited to 'arch/x86/kernel/cpu/mcheck/p5.c')
| -rw-r--r-- | arch/x86/kernel/cpu/mcheck/p5.c | 15 |
1 files changed, 6 insertions, 9 deletions
diff --git a/arch/x86/kernel/cpu/mcheck/p5.c b/arch/x86/kernel/cpu/mcheck/p5.c index 015f481ab1b..5c0e6533d9b 100644 --- a/arch/x86/kernel/cpu/mcheck/p5.c +++ b/arch/x86/kernel/cpu/mcheck/p5.c @@ -10,12 +10,11 @@ #include <asm/processor.h> #include <asm/system.h> +#include <asm/mce.h> #include <asm/msr.h> -#include "mce.h" - /* By default disabled */ -int mce_p5_enable; +int mce_p5_enabled __read_mostly; /* Machine check handler for Pentium class Intel CPUs: */ static void pentium_machine_check(struct pt_regs *regs, long error_code) @@ -43,15 +42,13 @@ void intel_p5_mcheck_init(struct cpuinfo_x86 *c) { u32 l, h; - /* Check for MCE support: */ - if (!cpu_has(c, X86_FEATURE_MCE)) + /* Default P5 to off as its often misconnected: */ + if (!mce_p5_enabled) return; -#ifdef CONFIG_X86_OLD_MCE - /* Default P5 to off as its often misconnected: */ - if (mce_disabled != -1) + /* Check for MCE support: */ + if (!cpu_has(c, X86_FEATURE_MCE)) return; -#endif machine_check_vector = pentium_machine_check; /* Make sure the vector pointer is visible before we enable MCEs: */ |