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authorTakashi Iwai <tiwai@suse.de>2014-03-13 09:53:25 +0100
committerTakashi Iwai <tiwai@suse.de>2014-03-13 09:53:25 +0100
commit5fdb83f190ee2218d113a46b190b70aa1c979325 (patch)
treefbb95a73b111c2e4d0320393754c11a9ec026b39 /arch/x86/kernel/cpu/perf_event_intel.c
parent4c16ecc4c0715e0b6b3c7b72976c05b0e212cd0f (diff)
parentdeeed33850c8a376addabbf971df433b2a1ba74c (diff)
Merge tag 'asoc-v3.15' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound into for-next
ASoC: Updates for v3.15 Quite a busy release for ASoC this time, more on janitorial work than exciting new features but welcome nontheless: - Lots of cleanups from Takashi for enumerations; the original API for these was error prone so he's refactored lots of code to use more modern APIs which avoid issues. - Elimination of the ASoC level wrappers for I2C and SPI moving us closer to converting to regmap completely and avoiding some randconfig hassle. - Provide both manually and transparently locked DAPM APIs rather than a mix of the two fixing some concurrency issues. - Start converting CODEC drivers to use separate bus interface drivers rather than having them all in one file helping avoid dependency issues. - DPCM support for Intel Haswell and Bay Trail platforms. - Lots of work on improvements for simple-card, DaVinci and the Renesas rcar drivers. - New drivers for Analog Devices ADAU1977, TI PCM512x and parts of the CSR SiRF SoC.
Diffstat (limited to 'arch/x86/kernel/cpu/perf_event_intel.c')
-rw-r--r--arch/x86/kernel/cpu/perf_event_intel.c11
1 files changed, 3 insertions, 8 deletions
diff --git a/arch/x86/kernel/cpu/perf_event_intel.c b/arch/x86/kernel/cpu/perf_event_intel.c
index 0fa4f242f05..aa333d96688 100644
--- a/arch/x86/kernel/cpu/perf_event_intel.c
+++ b/arch/x86/kernel/cpu/perf_event_intel.c
@@ -1361,10 +1361,8 @@ static int intel_pmu_handle_irq(struct pt_regs *regs)
intel_pmu_disable_all();
handled = intel_pmu_drain_bts_buffer();
status = intel_pmu_get_status();
- if (!status) {
- intel_pmu_enable_all(0);
- return handled;
- }
+ if (!status)
+ goto done;
loops = 0;
again:
@@ -2310,10 +2308,7 @@ __init int intel_pmu_init(void)
if (version > 1)
x86_pmu.num_counters_fixed = max((int)edx.split.num_counters_fixed, 3);
- /*
- * v2 and above have a perf capabilities MSR
- */
- if (version > 1) {
+ if (boot_cpu_has(X86_FEATURE_PDCM)) {
u64 capabilities;
rdmsrl(MSR_IA32_PERF_CAPABILITIES, capabilities);