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authorThomas Gleixner <tglx@linutronix.de>2008-01-30 13:30:19 +0100
committerIngo Molnar <mingo@elte.hu>2008-01-30 13:30:19 +0100
commit87ebecf14ca4f669cb52be46c954f3d9201394b8 (patch)
treef36b8072bc081b3f483c29e5394ab96cdf501201 /arch/x86/kernel/irq_64.c
parent3e35a0e525253837fc0ea4d0e060de3302bd9537 (diff)
x86: move ack_bad_irq into irq code
Match i386, where we have this in the irq code. It belongs there. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'arch/x86/kernel/irq_64.c')
-rw-r--r--arch/x86/kernel/irq_64.c20
1 files changed, 20 insertions, 0 deletions
diff --git a/arch/x86/kernel/irq_64.c b/arch/x86/kernel/irq_64.c
index 6b5c730d67b..6c3a3b6e5cf 100644
--- a/arch/x86/kernel/irq_64.c
+++ b/arch/x86/kernel/irq_64.c
@@ -20,6 +20,26 @@
atomic_t irq_err_count;
+/*
+ * 'what should we do if we get a hw irq event on an illegal vector'.
+ * each architecture has to answer this themselves.
+ */
+void ack_bad_irq(unsigned int irq)
+{
+ printk(KERN_WARNING "unexpected IRQ trap at vector %02x\n", irq);
+ /*
+ * Currently unexpected vectors happen only on SMP and APIC.
+ * We _must_ ack these because every local APIC has only N
+ * irq slots per priority level, and a 'hanging, unacked' IRQ
+ * holds up an irq slot - in excessive cases (when multiple
+ * unexpected vectors occur) that might lock up the APIC
+ * completely.
+ * But don't ack when the APIC is disabled. -AK
+ */
+ if (!disable_apic)
+ ack_APIC_irq();
+}
+
#ifdef CONFIG_DEBUG_STACKOVERFLOW
/*
* Probabilistic stack overflow check: