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authorIngo Molnar <mingo@elte.hu>2008-02-14 23:30:20 +0100
committerIngo Molnar <mingo@elte.hu>2008-02-14 23:30:20 +0100
commit184652eb6f68050af48a2ce3d5cf0537c208bee2 (patch)
tree1362a91c254120b68e324f58cc2715139bba53a5 /arch/x86/kernel/pci-gart_64.c
parent3223f59f9cd9d69a4344eeac8b16a262c5f373f1 (diff)
x86: fix gart_iommu_init()
When the GART table is unmapped from the kernel direct mappings during early bootup, make sure we have no leftover cachelines in it. Note: the clflush done by set_memory_np() was not enough, because clflush does not work on unmapped pages. Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Diffstat (limited to 'arch/x86/kernel/pci-gart_64.c')
-rw-r--r--arch/x86/kernel/pci-gart_64.c9
1 files changed, 9 insertions, 0 deletions
diff --git a/arch/x86/kernel/pci-gart_64.c b/arch/x86/kernel/pci-gart_64.c
index 65f6acb025c..faf3229f8fb 100644
--- a/arch/x86/kernel/pci-gart_64.c
+++ b/arch/x86/kernel/pci-gart_64.c
@@ -749,6 +749,15 @@ void __init gart_iommu_init(void)
*/
set_memory_np((unsigned long)__va(iommu_bus_base),
iommu_size >> PAGE_SHIFT);
+ /*
+ * Tricky. The GART table remaps the physical memory range,
+ * so the CPU wont notice potential aliases and if the memory
+ * is remapped to UC later on, we might surprise the PCI devices
+ * with a stray writeout of a cacheline. So play it sure and
+ * do an explicit, full-scale wbinvd() _after_ having marked all
+ * the pages as Not-Present:
+ */
+ wbinvd();
/*
* Try to workaround a bug (thanks to BenH)