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author | Trond Myklebust <Trond.Myklebust@netapp.com> | 2008-02-15 13:36:30 -0500 |
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committer | Trond Myklebust <Trond.Myklebust@netapp.com> | 2008-02-15 13:36:30 -0500 |
commit | 52833e897fd8c6f62b3e5e27291fa9bc803f7460 (patch) | |
tree | cfe90047ee6c7402674a29ec7258319142b96ff1 /arch/x86/kernel/pci-gart_64.c | |
parent | 8d042218b075de3cdbe066198515b3521553746e (diff) | |
parent | 4ee29f6a52158cea526b16a44ae38643946103ec (diff) |
Merge branch 'linus_origin' into hotfixes
Diffstat (limited to 'arch/x86/kernel/pci-gart_64.c')
-rw-r--r-- | arch/x86/kernel/pci-gart_64.c | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/arch/x86/kernel/pci-gart_64.c b/arch/x86/kernel/pci-gart_64.c index 65f6acb025c..faf3229f8fb 100644 --- a/arch/x86/kernel/pci-gart_64.c +++ b/arch/x86/kernel/pci-gart_64.c @@ -749,6 +749,15 @@ void __init gart_iommu_init(void) */ set_memory_np((unsigned long)__va(iommu_bus_base), iommu_size >> PAGE_SHIFT); + /* + * Tricky. The GART table remaps the physical memory range, + * so the CPU wont notice potential aliases and if the memory + * is remapped to UC later on, we might surprise the PCI devices + * with a stray writeout of a cacheline. So play it sure and + * do an explicit, full-scale wbinvd() _after_ having marked all + * the pages as Not-Present: + */ + wbinvd(); /* * Try to workaround a bug (thanks to BenH) |