diff options
| author | Glauber de Oliveira Costa <gcosta@redhat.com> | 2008-03-19 14:25:51 -0300 |
|---|---|---|
| committer | Ingo Molnar <mingo@elte.hu> | 2008-04-17 17:41:02 +0200 |
| commit | 6becedbb06072c5741d4057b9facecb4b3143711 (patch) | |
| tree | 113749313f8f025ec7e5c44d27b3a516785e4608 /arch/x86/kernel/smpboot_32.c | |
| parent | e481fcf8563d300e7f8875cae5fdc41941d29de0 (diff) | |
x86: minor adjustments for do_boot_cpu
This patch provides minor adjustments for do_boot_cpus
in both architectures to allow for integration
Signed-off-by: Glauber Costa <gcosta@redhat.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'arch/x86/kernel/smpboot_32.c')
| -rw-r--r-- | arch/x86/kernel/smpboot_32.c | 22 |
1 files changed, 14 insertions, 8 deletions
diff --git a/arch/x86/kernel/smpboot_32.c b/arch/x86/kernel/smpboot_32.c index bd2f8863efa..5165b11d8aa 100644 --- a/arch/x86/kernel/smpboot_32.c +++ b/arch/x86/kernel/smpboot_32.c @@ -556,7 +556,7 @@ static int __cpuinit do_boot_cpu(int apicid, int cpu) * Returns zero if CPU booted OK, else error code from wakeup_secondary_cpu. */ { - unsigned long boot_error; + unsigned long boot_error = 0; int timeout; unsigned long start_eip; unsigned short nmi_high = 0, nmi_low = 0; @@ -566,11 +566,7 @@ static int __cpuinit do_boot_cpu(int apicid, int cpu) }; INIT_WORK(&c_idle.work, do_fork_idle); - /* - * Save current MTRR state in case it was changed since early boot - * (e.g. by the ACPI SMI) to initialize new CPUs with MTRRs in sync: - */ - mtrr_save_state(); + alternatives_smp_switch(1); c_idle.idle = get_idle_for_cpu(cpu); @@ -607,8 +603,6 @@ do_rest: /* start_eip had better be page-aligned! */ start_eip = setup_trampoline(); - alternatives_smp_switch(1); - /* So we see what's up */ printk("Booting processor %d/%d ip %lx\n", cpu, apicid, start_eip); /* Stack for startup_32 can be just as for start_secondary onwards */ @@ -628,6 +622,12 @@ do_rest: store_NMI_vector(&nmi_high, &nmi_low); smpboot_setup_warm_reset_vector(start_eip); + /* + * Be paranoid about clearing APIC errors. + */ + apic_write(APIC_ESR, 0); + apic_read(APIC_ESR); + /* * Starting actual IPI sequence... @@ -864,6 +864,12 @@ int __cpuinit native_cpu_up(unsigned int cpu) return -EINVAL; } + /* + * Save current MTRR state in case it was changed since early boot + * (e.g. by the ACPI SMI) to initialize new CPUs with MTRRs in sync: + */ + mtrr_save_state(); + per_cpu(cpu_state, cpu) = CPU_UP_PREPARE; __smp_prepare_cpu(cpu); |