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authorThomas Gleixner <tglx@linutronix.de>2009-06-08 22:33:10 +0200
committerIngo Molnar <mingo@elte.hu>2009-06-08 23:10:37 +0200
commitf86748e91a14bd6cc49477560f33ed5d59896e89 (patch)
tree4c77717a4e050f7e5b7a5ead8eb31c5e219cc0d7 /arch/x86/kernel/traps.c
parent1123e3ad73697d64ad99f0104bbe49f8b52d7d65 (diff)
perf_counter, x86: Implement generalized cache event types, add AMD support
Fill in amd_hw_cache_event_id[] with the AMD CPU specific events, for family 0x0f, 0x10 and 0x11. There's apparently no distinction between load and store events, so we only fill in the load events. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Cc: Peter Zijlstra <a.p.zijlstra@chello.nl> Cc: Mike Galbraith <efault@gmx.de> Cc: Paul Mackerras <paulus@samba.org> Cc: Arnaldo Carvalho de Melo <acme@redhat.com> LKML-Reference: <new-submission> Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'arch/x86/kernel/traps.c')
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