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authorAvi Kivity <avi@qumranet.com>2008-03-18 11:05:52 +0200
committerAvi Kivity <avi@qumranet.com>2008-04-27 12:00:33 +0300
commit947da53830690cbd77d7f2b625d0df1f161ffd54 (patch)
tree32db5b7e97b5df34ada31ac9de8f3250b90dfd55 /arch/x86/kvm/paging_tmpl.h
parent97646202bc3f190dfcb48a3d506ea2445717d392 (diff)
KVM: MMU: Set the accessed bit on non-speculative shadow ptes
If we populate a shadow pte due to a fault (and not speculatively due to a pte write) then we can set the accessed bit on it, as we know it will be set immediately on the next guest instruction. This saves a read-modify-write operation. Signed-off-by: Avi Kivity <avi@qumranet.com>
Diffstat (limited to 'arch/x86/kvm/paging_tmpl.h')
-rw-r--r--arch/x86/kvm/paging_tmpl.h4
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/x86/kvm/paging_tmpl.h b/arch/x86/kvm/paging_tmpl.h
index 57abbd09114..e9ae5dba724 100644
--- a/arch/x86/kvm/paging_tmpl.h
+++ b/arch/x86/kvm/paging_tmpl.h
@@ -266,7 +266,7 @@ static void FNAME(update_pte)(struct kvm_vcpu *vcpu, struct kvm_mmu_page *page,
get_page(npage);
mmu_set_spte(vcpu, spte, page->role.access, pte_access, 0, 0,
gpte & PT_DIRTY_MASK, NULL, largepage, gpte_to_gfn(gpte),
- npage);
+ npage, true);
}
/*
@@ -349,7 +349,7 @@ static u64 *FNAME(fetch)(struct kvm_vcpu *vcpu, gva_t addr,
mmu_set_spte(vcpu, shadow_ent, access, walker->pte_access & access,
user_fault, write_fault,
walker->ptes[walker->level-1] & PT_DIRTY_MASK,
- ptwrite, largepage, walker->gfn, page);
+ ptwrite, largepage, walker->gfn, page, false);
return shadow_ent;
}