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authorMaxime Bizon <mbizon@freebox.fr>2012-10-19 10:45:07 +0200
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2012-10-24 11:34:51 -0700
commit08ec212c0f92cbf30e3ecc7349f18151714041d6 (patch)
tree625afda99083d4c04aa3899b1470f6d03135e052 /arch/x86/platform
parent7a0c4edae99da6ab3d402deb0d88410251c6ac63 (diff)
x86: ce4100: allow second UART usage
The current CE4100 and 8250_pci code have both a limitation preventing the registration and usage of CE4100's second UART. This patch changes the platform code fixing up the UART port to work on a relative UART port base address, as well as the 8250_pci code to make it register 2 UART ports for CE4100 and pass the port index down to all consumers. Signed-off-by: Florian Fainelli <ffainelli@freebox.fr> Acked-by: Alan Cox <alan@linux.intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'arch/x86/platform')
-rw-r--r--arch/x86/platform/ce4100/ce4100.c3
1 files changed, 3 insertions, 0 deletions
diff --git a/arch/x86/platform/ce4100/ce4100.c b/arch/x86/platform/ce4100/ce4100.c
index 4c61b52191e..0dcc30e9df8 100644
--- a/arch/x86/platform/ce4100/ce4100.c
+++ b/arch/x86/platform/ce4100/ce4100.c
@@ -92,8 +92,11 @@ static void ce4100_serial_fixup(int port, struct uart_port *up,
up->membase =
(void __iomem *)__fix_to_virt(FIX_EARLYCON_MEM_BASE);
up->membase += up->mapbase & ~PAGE_MASK;
+ up->mapbase += port * 0x100;
+ up->membase += port * 0x100;
up->iotype = UPIO_MEM32;
up->regshift = 2;
+ up->irq = 4;
}
#endif
up->iobase = 0;