diff options
| author | Fenghua Yu <fenghua.yu@intel.com> | 2011-05-17 18:44:27 -0700 |
|---|---|---|
| committer | H. Peter Anvin <hpa@linux.intel.com> | 2011-05-17 21:06:42 -0700 |
| commit | dc23c0bccf5eea171c87b3db285d032b9a5f06c4 (patch) | |
| tree | 755ec174162c6582cbe4aca7ee7f48ca7be855f2 /arch/x86 | |
| parent | d0281a257f370b09c410e466571858b4e12869c9 (diff) | |
x86, cpu: Add SMEP CPU feature in CR4
Add support for newly documented SMEP (Supervisor Mode Execution Protection)
CPU feature in CR4.
Signed-off-by: Fenghua Yu <fenghua.yu@intel.com>
LKML-Reference: <1305683069-25394-3-git-send-email-fenghua.yu@intel.com>
Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
Diffstat (limited to 'arch/x86')
| -rw-r--r-- | arch/x86/include/asm/processor-flags.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/x86/include/asm/processor-flags.h b/arch/x86/include/asm/processor-flags.h index a898a2b6e10..59ab4dffa37 100644 --- a/arch/x86/include/asm/processor-flags.h +++ b/arch/x86/include/asm/processor-flags.h @@ -60,6 +60,7 @@ #define X86_CR4_OSXMMEXCPT 0x00000400 /* enable unmasked SSE exceptions */ #define X86_CR4_VMXE 0x00002000 /* enable VMX virtualization */ #define X86_CR4_OSXSAVE 0x00040000 /* enable xsave and xrestore */ +#define X86_CR4_SMEP 0x00100000 /* enable SMEP support */ /* * x86-64 Task Priority Register, CR8 |