diff options
| author | Jacob Shin <jacob.shin@amd.com> | 2005-11-05 17:25:53 +0100 |
|---|---|---|
| committer | Linus Torvalds <torvalds@g5.osdl.org> | 2005-11-14 19:55:13 -0800 |
| commit | 89b831ef8bf5cfbb357dbc0a2e07700d7f20eec5 (patch) | |
| tree | 25118081599eab69bd20d1a1b34ba0f8f679f24f /arch/x86_64/Kconfig | |
| parent | 979edfadbae2286eec5b46143c00e81bca96498e (diff) | |
[PATCH] x86_64: Support for AMD specific MCE Threshold.
MC4_MISC - DRAM Errors Threshold Register realized under AMD K8 Rev F.
This register is used to count correctable and uncorrectable ECC errors that occur during DRAM read operations.
The user may interface through sysfs files in order to change the threshold configuration.
bank%d/error_count - reads current error count, write to clear.
bank%d/interrupt_enable - set/clear interrupt enable.
bank%d/threshold_limit - read/write the threshold limit.
APIC vector 0xF9 in hw_irq.h.
5 software defined bank ids in mce.h.
new apic.c function to setup threshold apic lvt.
defaults to interrupt off, count enabled, and threshold limit max.
sysfs interface created on /sys/devices/system/threshold.
AK: added some ifdefs to make it compile on UP
Signed-off-by: Jacob Shin <jacob.shin@amd.com>
Signed-off-by: Andi Kleen <ak@suse.de>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Diffstat (limited to 'arch/x86_64/Kconfig')
| -rw-r--r-- | arch/x86_64/Kconfig | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/arch/x86_64/Kconfig b/arch/x86_64/Kconfig index 21afa69a086..504dc52e8bf 100644 --- a/arch/x86_64/Kconfig +++ b/arch/x86_64/Kconfig @@ -374,6 +374,14 @@ config X86_MCE_INTEL Additional support for intel specific MCE features such as the thermal monitor. +config X86_MCE_AMD + bool "AMD MCE features" + depends on X86_MCE && X86_LOCAL_APIC + default y + help + Additional support for AMD specific MCE features such as + the DRAM Error Threshold. + config PHYSICAL_START hex "Physical address where the kernel is loaded" if EMBEDDED default "0x100000" |