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authorAndi Kleen <ak@suse.de>2005-09-12 18:49:23 +0200
committerLinus Torvalds <torvalds@g5.osdl.org>2005-09-12 10:49:55 -0700
commiteddfb4ed290383abf912630fa8dac5acf65c9e55 (patch)
treef13e544e4105facfb9d40d9ee86fb0d10ba29d04 /arch/x86_64/kernel/genapic_cluster.c
parentc1507eb2ee845b123ace751bec9c992a1937872c (diff)
[PATCH] x86-64: Remove obsolete APIC "write around" bug workaround
No x86-64 chipset has this bug Generated code doesn't change because it was always disabled. Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Diffstat (limited to 'arch/x86_64/kernel/genapic_cluster.c')
-rw-r--r--arch/x86_64/kernel/genapic_cluster.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/x86_64/kernel/genapic_cluster.c b/arch/x86_64/kernel/genapic_cluster.c
index f6523dd1bc0..a472d62f899 100644
--- a/arch/x86_64/kernel/genapic_cluster.c
+++ b/arch/x86_64/kernel/genapic_cluster.c
@@ -51,10 +51,10 @@ static void cluster_init_apic_ldr(void)
count = 3;
id = my_cluster | (1UL << count);
x86_cpu_to_log_apicid[smp_processor_id()] = id;
- apic_write_around(APIC_DFR, APIC_DFR_CLUSTER);
+ apic_write(APIC_DFR, APIC_DFR_CLUSTER);
val = apic_read(APIC_LDR) & ~APIC_LDR_MASK;
val |= SET_APIC_LOGICAL_ID(id);
- apic_write_around(APIC_LDR, val);
+ apic_write(APIC_LDR, val);
}
/* Start with all IRQs pointing to boot CPU. IRQ balancing will shift them. */