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authorJeff Garzik <jgarzik@pobox.com>2006-02-09 04:28:13 -0500
committerJeff Garzik <jgarzik@pobox.com>2006-02-09 04:28:13 -0500
commit99b3738fbf17208ac474420fa6b7e4b0c0c2b9ed (patch)
tree6f977546112ccbd617ef40ae38a1ca558d71bce9 /arch/x86_64/kernel/mpparse.c
parent332b5a52f2f96bc2d13bbe594a430318c0ee4425 (diff)
parent8a19ac89edbe9b702c10fd2039b8cb2db4644a5f (diff)
Merge branch 'upstream'
Diffstat (limited to 'arch/x86_64/kernel/mpparse.c')
-rw-r--r--arch/x86_64/kernel/mpparse.c8
1 files changed, 4 insertions, 4 deletions
diff --git a/arch/x86_64/kernel/mpparse.c b/arch/x86_64/kernel/mpparse.c
index 1105250bf02..dc49bfb6db0 100644
--- a/arch/x86_64/kernel/mpparse.c
+++ b/arch/x86_64/kernel/mpparse.c
@@ -915,7 +915,7 @@ void __init mp_config_acpi_legacy_irqs (void)
#define MAX_GSI_NUM 4096
-int mp_register_gsi(u32 gsi, int edge_level, int active_high_low)
+int mp_register_gsi(u32 gsi, int triggering, int polarity)
{
int ioapic = -1;
int ioapic_pin = 0;
@@ -964,7 +964,7 @@ int mp_register_gsi(u32 gsi, int edge_level, int active_high_low)
mp_ioapic_routing[ioapic].pin_programmed[idx] |= (1<<bit);
- if (edge_level) {
+ if (triggering == ACPI_LEVEL_SENSITIVE) {
/*
* For PCI devices assign IRQs in order, avoiding gaps
* due to unused I/O APIC pins.
@@ -986,8 +986,8 @@ int mp_register_gsi(u32 gsi, int edge_level, int active_high_low)
}
io_apic_set_pci_routing(ioapic, ioapic_pin, gsi,
- edge_level == ACPI_EDGE_SENSITIVE ? 0 : 1,
- active_high_low == ACPI_ACTIVE_HIGH ? 0 : 1);
+ triggering == ACPI_EDGE_SENSITIVE ? 0 : 1,
+ polarity == ACPI_ACTIVE_HIGH ? 0 : 1);
return gsi;
}