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authorLinus Torvalds <torvalds@g5.osdl.org>2006-09-30 08:37:55 -0700
committerLinus Torvalds <torvalds@g5.osdl.org>2006-09-30 08:37:55 -0700
commit369aa8395a5dcc89230f1de5459124c4b0db9fca (patch)
treed95edf4c52e343e2080427ad153da051ea52eee6 /arch/x86_64/kernel/vsyscall.c
parentbf603625660b1742004bf86432ce3c210d14d4fd (diff)
parentc84ef5305930d19bdd6cd576b3a3a73786a82e57 (diff)
Merge branch 'for-linus' of git://one.firstfloor.org/home/andi/git/linux-2.6
* 'for-linus' of git://one.firstfloor.org/home/andi/git/linux-2.6: [PATCH] Use early clobber in semaphores [PATCH] Define vsyscall cache as blob to make clearer that user space shouldn't use it [PATCH] Re-positioning the bss segment [PATCH] Use ARRAY_SIZE in setup.c [PATCH] i386: replace intermediate array-size definitions with ARRAY_SIZE() [PATCH] x86: Clean up x86 NMI sysctls [PATCH] Refactor some duplicated code in mpparse.c [PATCH] Document iommu=panic [PATCH] Fix broken indentation in iommu_setup [PATCH] Allow disabling DAC using command line options [PATCH] Add proper sparse __user casts to __copy_to_user_inatomic [PATCH] i386: Update defconfig [PATCH] Update defconfig
Diffstat (limited to 'arch/x86_64/kernel/vsyscall.c')
-rw-r--r--arch/x86_64/kernel/vsyscall.c8
1 files changed, 4 insertions, 4 deletions
diff --git a/arch/x86_64/kernel/vsyscall.c b/arch/x86_64/kernel/vsyscall.c
index ac48c3857dd..07c08638205 100644
--- a/arch/x86_64/kernel/vsyscall.c
+++ b/arch/x86_64/kernel/vsyscall.c
@@ -155,8 +155,8 @@ vgetcpu(unsigned *cpu, unsigned *node, struct getcpu_cache *tcache)
We do this here because otherwise user space would do it on
its own in a likely inferior way (no access to jiffies).
If you don't like it pass NULL. */
- if (tcache && tcache->t0 == (j = __jiffies)) {
- p = tcache->t1;
+ if (tcache && tcache->blob[0] == (j = __jiffies)) {
+ p = tcache->blob[1];
} else if (__vgetcpu_mode == VGETCPU_RDTSCP) {
/* Load per CPU data from RDTSCP */
rdtscp(dummy, dummy, p);
@@ -165,8 +165,8 @@ vgetcpu(unsigned *cpu, unsigned *node, struct getcpu_cache *tcache)
asm("lsl %1,%0" : "=r" (p) : "r" (__PER_CPU_SEG));
}
if (tcache) {
- tcache->t0 = j;
- tcache->t1 = p;
+ tcache->blob[0] = j;
+ tcache->blob[1] = p;
}
if (cpu)
*cpu = p & 0xfff;