diff options
| author | Linus Torvalds <torvalds@linux-foundation.org> | 2009-01-07 11:56:29 -0800 |
|---|---|---|
| committer | Linus Torvalds <torvalds@linux-foundation.org> | 2009-01-07 11:56:29 -0800 |
| commit | 52fefcec97c25b15887e6a9a885ca54e7f7c0928 (patch) | |
| tree | 4898112a7fb30c20a9da3aefe9fdc7fdebda57a6 /arch/xtensa/include/asm/cache.h | |
| parent | a0e280e0f33f6c859a235fb69a875ed8f3420388 (diff) | |
| parent | 5fee325e7d2bcbebf1cb38b4ff3a7aa3744c43e3 (diff) | |
Merge git://git.kernel.org/pub/scm/linux/kernel/git/czankel/xtensa-2.6
* git://git.kernel.org/pub/scm/linux/kernel/git/czankel/xtensa-2.6:
xtensa: Update platform files to reflect new location of the header files.
xtensa: switch to packed struct unaligned access implementation
xtensa: Add xt2000 support files.
xtensa: move headers files to arch/xtensa/include
xtensa: use the new byteorder headers
Diffstat (limited to 'arch/xtensa/include/asm/cache.h')
| -rw-r--r-- | arch/xtensa/include/asm/cache.h | 33 |
1 files changed, 33 insertions, 0 deletions
diff --git a/arch/xtensa/include/asm/cache.h b/arch/xtensa/include/asm/cache.h new file mode 100644 index 00000000000..f04c9891142 --- /dev/null +++ b/arch/xtensa/include/asm/cache.h @@ -0,0 +1,33 @@ +/* + * include/asm-xtensa/cache.h + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + * + * (C) 2001 - 2005 Tensilica Inc. + */ + +#ifndef _XTENSA_CACHE_H +#define _XTENSA_CACHE_H + +#include <variant/core.h> + +#define L1_CACHE_SHIFT XCHAL_DCACHE_LINEWIDTH +#define L1_CACHE_BYTES XCHAL_DCACHE_LINESIZE +#define SMP_CACHE_BYTES L1_CACHE_BYTES + +#define DCACHE_WAY_SIZE (XCHAL_DCACHE_SIZE/XCHAL_DCACHE_WAYS) +#define ICACHE_WAY_SIZE (XCHAL_ICACHE_SIZE/XCHAL_ICACHE_WAYS) +#define DCACHE_WAY_SHIFT (XCHAL_DCACHE_SETWIDTH + XCHAL_DCACHE_LINEWIDTH) +#define ICACHE_WAY_SHIFT (XCHAL_ICACHE_SETWIDTH + XCHAL_ICACHE_LINEWIDTH) + +/* Maximum cache size per way. */ +#if DCACHE_WAY_SIZE >= ICACHE_WAY_SIZE +# define CACHE_WAY_SIZE DCACHE_WAY_SIZE +#else +# define CACHE_WAY_SIZE ICACHE_WAY_SIZE +#endif + + +#endif /* _XTENSA_CACHE_H */ |