diff options
author | Max Filippov <jcmvbkbc@gmail.com> | 2012-10-15 03:55:38 +0400 |
---|---|---|
committer | Chris Zankel <chris@zankel.net> | 2012-10-15 21:48:08 -0700 |
commit | bc5378fcba974317f9657c4fdc78af227e1e1068 (patch) | |
tree | 998b8f8badf1d7a5dc0fd796f3e8501f8c5394ae /arch/xtensa/include/asm/mmu_context.h | |
parent | f4349b6e01c8927a04795885702a173b6a60573c (diff) |
xtensa: reorganize SR referencing
- reference SRs by names where possible, not by numbers;
- get rid of __stringify around SR names where possible;
- remove unneeded SR names from asm/regs.h;
- add SREG_ prefix to remaining SR names;
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Signed-off-by: Chris Zankel <chris@zankel.net>
Diffstat (limited to 'arch/xtensa/include/asm/mmu_context.h')
-rw-r--r-- | arch/xtensa/include/asm/mmu_context.h | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/xtensa/include/asm/mmu_context.h b/arch/xtensa/include/asm/mmu_context.h index dbd8731a876..feb10af9651 100644 --- a/arch/xtensa/include/asm/mmu_context.h +++ b/arch/xtensa/include/asm/mmu_context.h @@ -51,14 +51,14 @@ extern unsigned long asid_cache; static inline void set_rasid_register (unsigned long val) { - __asm__ __volatile__ (" wsr %0, "__stringify(RASID)"\n\t" + __asm__ __volatile__ (" wsr %0, rasid\n\t" " isync\n" : : "a" (val)); } static inline unsigned long get_rasid_register (void) { unsigned long tmp; - __asm__ __volatile__ (" rsr %0,"__stringify(RASID)"\n\t" : "=a" (tmp)); + __asm__ __volatile__ (" rsr %0, rasid\n\t" : "=a" (tmp)); return tmp; } |