diff options
| author | H. Peter Anvin <hpa@zytor.com> | 2008-02-14 14:56:45 -0800 |
|---|---|---|
| committer | Ingo Molnar <mingo@elte.hu> | 2008-02-26 12:55:51 +0100 |
| commit | 959b3be64cab9160cd74532a49b89cdd918d38e9 (patch) | |
| tree | 838955725add661e1e82894be13a32b5380eceae /arch | |
| parent | 7343b3b3a627eb30e24e921f004f659c8ebb91c5 (diff) | |
x86: don't use P6_NOPs if compiling with CONFIG_X86_GENERIC
P6_NOPs are definitely not supported on some VIA CPUs, and possibly
(unverified) on AMD K7s. It is also the only thing that prevents a
686 kernel from running on Transmeta TM3x00/5x00 (Crusoe) series.
The performance benefit over generic NOPs is very small, so when
building for generic consumption, avoid using them.
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/x86/Kconfig.cpu | 11 |
1 files changed, 10 insertions, 1 deletions
diff --git a/arch/x86/Kconfig.cpu b/arch/x86/Kconfig.cpu index 86fd2a0e459..6d50064db18 100644 --- a/arch/x86/Kconfig.cpu +++ b/arch/x86/Kconfig.cpu @@ -377,9 +377,18 @@ config X86_OOSTORE def_bool y depends on (MWINCHIP3D || MWINCHIP2 || MWINCHIPC6) && MTRR +# +# P6_NOPs are a relatively minor optimization that require a family >= +# 6 processor, except that it is broken on certain VIA chips. +# Furthermore, AMD chips prefer a totally different sequence of NOPs +# (which work on all CPUs). As a result, disallow these if we're +# compiling X86_GENERIC but not X86_64 (these NOPs do work on all +# x86-64 capable chips); the list of processors in the right-hand clause +# are the cores that benefit from this optimization. +# config X86_P6_NOP def_bool y - depends on (M686 || MPENTIUMII || MPENTIUMIII || MPENTIUMM || MCORE2 || PENTIUM4) + depends on (X86_64 || !X86_GENERIC) && (M686 || MPENTIUMII || MPENTIUMIII || MPENTIUMM || MCORE2 || PENTIUM4) config X86_TSC def_bool y |