diff options
| author | Eric Lammerts <eric@lammerts.org> | 2005-07-31 22:34:42 -0700 |
|---|---|---|
| committer | Linus Torvalds <torvalds@g5.osdl.org> | 2005-08-01 19:13:59 -0700 |
| commit | cdf32eaa4e601b15146e21b6470de00f149ce37f (patch) | |
| tree | b57d079ef6cd4318aaae485d2abe03d6b38a51d3 /arch | |
| parent | 3fef3fa24d8d1bb6d82cad195f73917fa6534dac (diff) | |
[PATCH] disable addres space randomization default on transmeta CPUs
We know that the randomisation slows down some workloads on Transmeta CPUs
by quite large amounts. We think it's because the CPU needs to recode the
same x86 instructions when they pop up at a different virtual address after
a fork+exec.
So disable randomization by default on those CPUs.
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/i386/kernel/cpu/transmeta.c | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/arch/i386/kernel/cpu/transmeta.c b/arch/i386/kernel/cpu/transmeta.c index f57e5ee9494..d8e59e19867 100644 --- a/arch/i386/kernel/cpu/transmeta.c +++ b/arch/i386/kernel/cpu/transmeta.c @@ -76,6 +76,10 @@ static void __init init_transmeta(struct cpuinfo_x86 *c) #define USER686 (X86_FEATURE_TSC|X86_FEATURE_CX8|X86_FEATURE_CMOV) if ( c->x86 == 5 && (c->x86_capability[0] & USER686) == USER686 ) c->x86 = 6; + + /* randomize_va_space slows us down enormously; + it probably triggers retranslation of x86->native bytecode */ + randomize_va_space = 0; } static void transmeta_identify(struct cpuinfo_x86 * c) |