diff options
| author | Stefan Roese <sr@denx.de> | 2007-03-16 21:06:00 +0100 |
|---|---|---|
| committer | Paul Mackerras <paulus@samba.org> | 2007-03-26 12:35:11 +1000 |
| commit | ec5f77e789a02adf7c45f03a76455b4e71ae1c5b (patch) | |
| tree | f52a07dbd3ba810d16cd645950159a62c4c70d70 /arch | |
| parent | f6f7dde3f778b318aca71220834482d4ea2d7738 (diff) | |
[POWERPC] ppc: Fix PCIX configuration of Ocotea & Taishan for > 512MB DDR
Change the configuration of the PCIX PCI->PLB inbound memory window
to be 2GB instead of 512kB. The comment already mentioned 2GB, but the
code unfortunately didn't reflect this.
Signed-off-by: Stefan Roese <sr@denx.de>
Signed-off-by: Paul Mackerras <paulus@samba.org>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/ppc/platforms/4xx/ocotea.c | 2 | ||||
| -rw-r--r-- | arch/ppc/platforms/4xx/taishan.c | 2 |
2 files changed, 2 insertions, 2 deletions
diff --git a/arch/ppc/platforms/4xx/ocotea.c b/arch/ppc/platforms/4xx/ocotea.c index 84e999d9a7b..c8017c9f132 100644 --- a/arch/ppc/platforms/4xx/ocotea.c +++ b/arch/ppc/platforms/4xx/ocotea.c @@ -178,7 +178,7 @@ ocotea_setup_pcix(void) /* Setup 2GB PCI->PLB inbound memory window at 0, enable MSIs */ PCIX_WRITEL(0x00000000, PCIX0_PIM0LAH); PCIX_WRITEL(0x00000000, PCIX0_PIM0LAL); - PCIX_WRITEL(0xe0000007, PCIX0_PIM0SA); + PCIX_WRITEL(0x80000007, PCIX0_PIM0SA); eieio(); } diff --git a/arch/ppc/platforms/4xx/taishan.c b/arch/ppc/platforms/4xx/taishan.c index bb0253eef45..5d9af8ddb15 100644 --- a/arch/ppc/platforms/4xx/taishan.c +++ b/arch/ppc/platforms/4xx/taishan.c @@ -235,7 +235,7 @@ taishan_setup_pcix(void) /* Setup 2GB PCI->PLB inbound memory window at 0, enable MSIs */ PCIX_WRITEL(0x00000000, PCIX0_PIM0LAH); PCIX_WRITEL(0x00000000, PCIX0_PIM0LAL); - PCIX_WRITEL(0xe0000007, PCIX0_PIM0SA); + PCIX_WRITEL(0x80000007, PCIX0_PIM0SA); PCIX_WRITEL(0xffffffff, PCIX0_PIM0SAH); iounmap(pcix_reg_base); |