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authorBen Dooks <ben@simtec.co.uk>2009-07-30 23:23:20 +0100
committerBen Dooks <ben-linux@fluff.org>2009-07-30 23:22:51 +0100
commitb0e66522f4d86713b0450255210e26c4f11ee86b (patch)
treeef82f9a041ba93a8ca0df6f55802bb23e8aa36ef /arch
parent9b71de49b030ad8fd4d13d38571b5c42dc9ed8dd (diff)
ARM: S3C24XX: Add BWSCON per-bank information.
Add definitions and an accessor macro to deal with reading bus information from S3C2410_BWSCON for any given numbered bank. Signed-off-by: Ben Dooks <ben@simtec.co.uk> Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/mach-s3c2410/include/mach/regs-mem.h10
1 files changed, 10 insertions, 0 deletions
diff --git a/arch/arm/mach-s3c2410/include/mach/regs-mem.h b/arch/arm/mach-s3c2410/include/mach/regs-mem.h
index 57759804e2f..7f7c5294796 100644
--- a/arch/arm/mach-s3c2410/include/mach/regs-mem.h
+++ b/arch/arm/mach-s3c2410/include/mach/regs-mem.h
@@ -73,6 +73,16 @@
#define S3C2410_BWSCON_WS7 (1<<30)
#define S3C2410_BWSCON_ST7 (1<<31)
+/* accesor functions for getting BANK(n) configuration. (n != 0) */
+
+#define S3C2410_BWSCON_GET(_bwscon, _bank) (((_bwscon) >> ((_bank) * 4)) & 0xf)
+
+#define S3C2410_BWSCON_DW8 (0)
+#define S3C2410_BWSCON_DW16 (1)
+#define S3C2410_BWSCON_DW32 (2)
+#define S3C2410_BWSCON_WS (1 << 2)
+#define S3C2410_BWSCON_ST (1 << 3)
+
/* memory set (rom, ram) */
#define S3C2410_BANKCON0 S3C2410_MEMREG(0x0004)
#define S3C2410_BANKCON1 S3C2410_MEMREG(0x0008)