diff options
author | Wu Zhangjin <wuzhangjin@gmail.com> | 2010-05-19 09:12:17 +0800 |
---|---|---|
committer | Ralf Baechle <ralf@linux-mips.org> | 2010-07-05 17:17:20 +0100 |
commit | f18b2f67eaae0dc0e3aaf1fd8ef320e2b69a514c (patch) | |
tree | 89d6968bb6f07af931ed2216c3bbb6710d0f38d3 /arch | |
parent | e1df057df814a4a70a8711c0226a1d178c33edaa (diff) |
MIPS: Loongson: CS5536: Add missing RDMSRs for IDE and USB
Add several missing RDMSRs for IDE and USB are missing to avoid the
agressive modification of the high 32 bits of the MSR.
Without this patch some usb devices may fail after printing "reset ehci
host ....." when reading the partition information.
Signed-off-by: Hu Hongbing <huhb@lemote.com>
Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
Cc: linux-mips@linux-mips.org
Cc: Zhang Le <r0bertz@gentoo.org>
Cc: Hu Hongbing <huhb@lemote.com>
Patchwork: http://patchwork.linux-mips.org/patch/1250/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch')
-rw-r--r-- | arch/mips/loongson/common/cs5536/cs5536_ehci.c | 2 | ||||
-rw-r--r-- | arch/mips/loongson/common/cs5536/cs5536_ide.c | 14 | ||||
-rw-r--r-- | arch/mips/loongson/common/cs5536/cs5536_ohci.c | 2 |
3 files changed, 17 insertions, 1 deletions
diff --git a/arch/mips/loongson/common/cs5536/cs5536_ehci.c b/arch/mips/loongson/common/cs5536/cs5536_ehci.c index eaf8b86e331..5b5cbba699b 100644 --- a/arch/mips/loongson/common/cs5536/cs5536_ehci.c +++ b/arch/mips/loongson/common/cs5536/cs5536_ehci.c @@ -49,6 +49,8 @@ void pci_ehci_write_reg(int reg, u32 value) lo |= SOFT_BAR_EHCI_FLAG; _wrmsr(GLCP_MSR_REG(GLCP_SOFT_COM), hi, lo); } else if ((value & 0x01) == 0x00) { + _rdmsr(USB_MSR_REG(USB_EHCI), &hi, &lo); + lo = value; _wrmsr(USB_MSR_REG(USB_EHCI), hi, lo); value &= 0xfffffff0; diff --git a/arch/mips/loongson/common/cs5536/cs5536_ide.c b/arch/mips/loongson/common/cs5536/cs5536_ide.c index 9a96b5664c7..7ebf17a949a 100644 --- a/arch/mips/loongson/common/cs5536/cs5536_ide.c +++ b/arch/mips/loongson/common/cs5536/cs5536_ide.c @@ -51,6 +51,7 @@ void pci_ide_write_reg(int reg, u32 value) lo |= SOFT_BAR_IDE_FLAG; _wrmsr(GLCP_MSR_REG(GLCP_SOFT_COM), hi, lo); } else if (value & 0x01) { + _rdmsr(IDE_MSR_REG(IDE_IO_BAR), &hi, &lo); lo = (value & 0xfffffff0) | 0x1; _wrmsr(IDE_MSR_REG(IDE_IO_BAR), hi, lo); @@ -65,19 +66,30 @@ void pci_ide_write_reg(int reg, u32 value) _rdmsr(DIVIL_MSR_REG(DIVIL_BALL_OPTS), &hi, &lo); lo |= 0x01; _wrmsr(DIVIL_MSR_REG(DIVIL_BALL_OPTS), hi, lo); - } else + } else { + _rdmsr(IDE_MSR_REG(IDE_CFG), &hi, &lo); + lo = value; _wrmsr(IDE_MSR_REG(IDE_CFG), hi, lo); + } break; case PCI_IDE_DTC_REG: + _rdmsr(IDE_MSR_REG(IDE_DTC), &hi, &lo); + lo = value; _wrmsr(IDE_MSR_REG(IDE_DTC), hi, lo); break; case PCI_IDE_CAST_REG: + _rdmsr(IDE_MSR_REG(IDE_CAST), &hi, &lo); + lo = value; _wrmsr(IDE_MSR_REG(IDE_CAST), hi, lo); break; case PCI_IDE_ETC_REG: + _rdmsr(IDE_MSR_REG(IDE_ETC), &hi, &lo); + lo = value; _wrmsr(IDE_MSR_REG(IDE_ETC), hi, lo); break; case PCI_IDE_PM_REG: + _rdmsr(IDE_MSR_REG(IDE_INTERNAL_PM), &hi, &lo); + lo = value; _wrmsr(IDE_MSR_REG(IDE_INTERNAL_PM), hi, lo); break; default: diff --git a/arch/mips/loongson/common/cs5536/cs5536_ohci.c b/arch/mips/loongson/common/cs5536/cs5536_ohci.c index db5900aadd6..bdedf512baf 100644 --- a/arch/mips/loongson/common/cs5536/cs5536_ohci.c +++ b/arch/mips/loongson/common/cs5536/cs5536_ohci.c @@ -49,6 +49,8 @@ void pci_ohci_write_reg(int reg, u32 value) lo |= SOFT_BAR_OHCI_FLAG; _wrmsr(GLCP_MSR_REG(GLCP_SOFT_COM), hi, lo); } else if ((value & 0x01) == 0x00) { + _rdmsr(USB_MSR_REG(USB_OHCI), &hi, &lo); + lo = value; _wrmsr(USB_MSR_REG(USB_OHCI), hi, lo); value &= 0xfffffff0; |