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authorPhilip Rakity <prakity@marvell.com>2011-01-07 11:26:52 -0800
committerEric Miao <eric.y.miao@gmail.com>2011-01-15 04:29:19 -0600
commitee309d3d6e60e19e93cde22e49b87c434dc826ba (patch)
tree304f4b46d9c4170bf6c1cf4d6e886e456a3647d1 /arch
parenta1015a159530391fc498482656bab6c99dcd3c70 (diff)
ARM: mmp: MMP2 drive strength FAST using wrong value
Drive strength for MMP2 is a 2 bit value but because of the mapping in plat-pxa/mfp.h needs to be shifted up one bit to handle real location in mfp registers. (MMP2 and PXA910 drive strength start at bit 11 while PXA168 starts at bit 10). Values 0, 1, 2, and 3 effectively need to be 0, 2, 4, and 6 to fit into register. 8 does not work. Signed-off-by: Philip Rakity <prakity@marvell.com> Tested-by: John Watlington <wad@laptop.org> Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/mach-mmp/include/mach/mfp-mmp2.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/mach-mmp/include/mach/mfp-mmp2.h b/arch/arm/mach-mmp/include/mach/mfp-mmp2.h
index 117e3036608..4ad38629c3f 100644
--- a/arch/arm/mach-mmp/include/mach/mfp-mmp2.h
+++ b/arch/arm/mach-mmp/include/mach/mfp-mmp2.h
@@ -6,7 +6,7 @@
#define MFP_DRIVE_VERY_SLOW (0x0 << 13)
#define MFP_DRIVE_SLOW (0x2 << 13)
#define MFP_DRIVE_MEDIUM (0x4 << 13)
-#define MFP_DRIVE_FAST (0x8 << 13)
+#define MFP_DRIVE_FAST (0x6 << 13)
/* GPIO */
#define GPIO0_GPIO MFP_CFG(GPIO0, AF0)