diff options
| author | Eric Bénard <eric@eukrea.com> | 2012-04-29 17:37:57 +0200 |
|---|---|---|
| committer | Mark Brown <broonie@opensource.wolfsonmicro.com> | 2012-04-30 10:06:44 +0100 |
| commit | e875c1e3e758447ba81ca450d89434b3b0496d37 (patch) | |
| tree | 88d9fac8a5290e49956dfd7c3624158975755b93 /arch | |
| parent | a3a53fe1545a87337cc539f415810128bbdad465 (diff) | |
ASoC: tlv312aic23: unbreak resume
* commit f9dfbf9 "ASoC: tlv320aic23: convert to soc-cache" leads to
a bug preventing resumeof the codec as regmap expects a 9 bits data
register but 0xFFFF is passed in tlv320aic23_set_bias_level and this
values gets cached preventing any write to the TLV320AIC23_PWR
register as the final value produced by regmap is (register << 9) | value
* this patch solves the problem by only working on the 9 bits the
register contains.
Signed-off-by: Eric Bénard <eric@eukrea.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Cc: stable@vger.kernel.org
Diffstat (limited to 'arch')
0 files changed, 0 insertions, 0 deletions