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authorCatalin Marinas <catalin.marinas@arm.com>2008-10-03 11:09:10 +0100
committerRussell King <rmk+kernel@arm.linux.org.uk>2008-10-03 11:32:09 +0100
commit000b50259271c9c14f6e175795f5164e1d51d35b (patch)
treed6c5cde5c74cb84e8ad4d3dc5beefdd131c0c010 /arch
parent3319f5e51a20f3e3c59ed7dac9fc2d5c89aa2d9f (diff)
[ARM] 5229/3: Replace some ARMv7 opcodes with the instruction name
These instructions were placed in the code directly as opcodes because early compilers didn't support them. Toolchains supporting ARMv7 understand these instructions and the patch puts the mnemonics back. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/boot/compressed/head.S2
-rw-r--r--arch/arm/mm/proc-v7.S2
2 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm/boot/compressed/head.S b/arch/arm/boot/compressed/head.S
index 1f1729b76d0..84a1e0496a3 100644
--- a/arch/arm/boot/compressed/head.S
+++ b/arch/arm/boot/compressed/head.S
@@ -802,7 +802,7 @@ loop1:
add r2, r2, #4 @ add 4 (line length offset)
ldr r4, =0x3ff
ands r4, r4, r1, lsr #3 @ find maximum number on the way size
- .word 0xe16f5f14 @ clz r5, r4 - find bit position of way size increment
+ clz r5, r4 @ find bit position of way size increment
ldr r7, =0x7fff
ands r7, r7, r1, lsr #13 @ extract max number of the index size
loop2:
diff --git a/arch/arm/mm/proc-v7.S b/arch/arm/mm/proc-v7.S
index dff96778462..a67e26f3dce 100644
--- a/arch/arm/mm/proc-v7.S
+++ b/arch/arm/mm/proc-v7.S
@@ -55,7 +55,7 @@ ENDPROC(cpu_v7_reset)
* IRQs are already disabled.
*/
ENTRY(cpu_v7_do_idle)
- .long 0xe320f003 @ ARM V7 WFI instruction
+ wfi
mov pc, lr
ENDPROC(cpu_v7_do_idle)