diff options
author | Will Deacon <will.deacon@arm.com> | 2011-10-03 18:29:03 +0100 |
---|---|---|
committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2011-10-17 09:03:03 +0100 |
commit | f73765fcb8bb79e80af58059441eb931679e68c0 (patch) | |
tree | 80ccf1b56155904432390b00e4a0870b511547cc /arch | |
parent | 6996f425e57d58a6f1884b7fd4bfc3ed3dd10c2d (diff) |
ARM: 7116/1: debug: provide dummy default option for DEBUG_LL UART choice
Defaulting to DEBUG_ICEDCC will cause systems to hang during boot unless
a hardware debugger is listening to the debug comms. channel.
This patch adds a dummy UART option as the default DEBUG_LL choice which
requires the platform to do the right thing.
Acked-by: Stephen Boyd <sboyd@codeaurora.org>
Tested-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch')
-rw-r--r-- | arch/arm/Kconfig.debug | 12 |
1 files changed, 10 insertions, 2 deletions
diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug index 91a826308d5..b3dc1fa3084 100644 --- a/arch/arm/Kconfig.debug +++ b/arch/arm/Kconfig.debug @@ -81,6 +81,14 @@ choice prompt "Kernel low-level debugging port" depends on DEBUG_LL + config DEBUG_LL_UART_NONE + bool "No low-level debugging UART" + help + Say Y here if your platform doesn't provide a UART option + below. This relies on your platform choosing the right UART + definition internally in order for low-level debugging to + work. + config DEBUG_ICEDCC bool "Kernel low-level debugging via EmbeddedICE DCC channel" help @@ -89,8 +97,8 @@ choice co-processor 14. This is known to work on the ARM9 style ICE channel and on the XScale with the PEEDI. - It does include a timeout to ensure that the system does not - totally freeze when there is nothing connected to read. + Note that the system will appear to hang during boot if there + is nothing connected to read from the DCC. config DEBUG_FOOTBRIDGE_COM1 bool "Kernel low-level debugging messages via footbridge 8250 at PCI COM1" |