diff options
| author | David Daney <ddaney@caviumnetworks.com> | 2010-07-26 14:29:37 -0700 |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2010-08-05 13:26:26 +0100 |
| commit | 0c2f4551df3880083e4733b5d928d2758b71162c (patch) | |
| tree | 2eec2945e305d8938fff39194d949493379c77a1 /arch | |
| parent | fa90c87297a1bebd8356e41d71518b37ada56583 (diff) | |
MIPS: Decode core number for R2 CPUs.
The struct cpuinfo_mips.core field should be populated with the
physical core number. For R2 CPUs, this is carried in the low 10 bits
of Ebase.
Signed-off-by: David Daney <ddaney@caviumnetworks.com>
To: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/1505/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/mips/kernel/cpu-probe.c | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/arch/mips/kernel/cpu-probe.c b/arch/mips/kernel/cpu-probe.c index 9b6633171a1..b1b304ea212 100644 --- a/arch/mips/kernel/cpu-probe.c +++ b/arch/mips/kernel/cpu-probe.c @@ -761,6 +761,9 @@ static void __cpuinit decode_configs(struct cpuinfo_mips *c) ok = decode_config4(c); mips_probe_watch_registers(c); + + if (cpu_has_mips_r2) + c->core = read_c0_ebase() & 0x3ff; } static inline void cpu_probe_mips(struct cpuinfo_mips *c, unsigned int cpu) |