diff options
| author | Stephen Warren <swarren@nvidia.com> | 2011-11-02 13:50:43 -0600 |
|---|---|---|
| committer | Olof Johansson <olof@lixom.net> | 2011-12-07 22:00:13 -0800 |
| commit | f5ce5e7e9cc3f69c3e6a0a4599262f740aff92c0 (patch) | |
| tree | 853f1dc2dd2fc013cc9f5666895a5b6414931f13 /arch | |
| parent | 103c43a2c6aaf7fc4932513e2991cdec60411b18 (diff) | |
arm/tegra: Remove code that's ifndef CONFIG_ARM_GIC
entry-macro.S contains some stale code for chips before Tegra20 that
apparently didn't use an ARM GIC. All chips supported by mainline use
an ARM GIC, so rip out the stale code.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/mach-tegra/include/mach/entry-macro.S | 23 |
1 files changed, 0 insertions, 23 deletions
diff --git a/arch/arm/mach-tegra/include/mach/entry-macro.S b/arch/arm/mach-tegra/include/mach/entry-macro.S index dd165c53889..485a11eeace 100644 --- a/arch/arm/mach-tegra/include/mach/entry-macro.S +++ b/arch/arm/mach-tegra/include/mach/entry-macro.S @@ -15,7 +15,6 @@ #include <mach/iomap.h> #include <mach/io.h> -#if defined(CONFIG_ARM_GIC) #define HAVE_GET_IRQNR_PREAMBLE #include <asm/hardware/entry-macro-gic.S> @@ -32,25 +31,3 @@ .macro arch_ret_to_user, tmp1, tmp2 .endm -#else - /* legacy interrupt controller for AP16 */ - .macro disable_fiq - .endm - - .macro get_irqnr_preamble, base, tmp - @ enable imprecise aborts - cpsie a - @ EVP base at 0xf010f000 - mov \base, #0xf0000000 - orr \base, #0x00100000 - orr \base, #0x0000f000 - .endm - - .macro arch_ret_to_user, tmp1, tmp2 - .endm - - .macro get_irqnr_and_base, irqnr, irqstat, base, tmp - ldr \irqnr, [\base, #0x20] @ EVT_IRQ_STS - cmp \irqnr, #0x80 - .endm -#endif |