diff options
author | Benjamin Herrenschmidt <benh@kernel.crashing.org> | 2007-11-20 18:32:12 +1100 |
---|---|---|
committer | Paul Mackerras <paulus@samba.org> | 2007-11-20 18:42:00 +1100 |
commit | 0b47759db54f82df68ed179ddc5cb2becea56158 (patch) | |
tree | c9b87d76571f5a856a914c9a86bc47731df6bb27 /arch | |
parent | 072ef40e08a71aae4ff2835e3c7f601b29daf227 (diff) |
[POWERPC] Fix 8xx build breakage due to _tlbie changes
My changes to _tlbie to fix 4xx unfortunately broke 8xx build in a
couple of places. This fixes it.
Spotted by Olof Johansson.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Vitaly Bordug <vitb@kernel.crashing.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
Diffstat (limited to 'arch')
-rw-r--r-- | arch/powerpc/mm/mem.c | 2 | ||||
-rw-r--r-- | arch/powerpc/mm/mmu_decl.h | 2 | ||||
-rw-r--r-- | arch/ppc/mm/init.c | 2 | ||||
-rw-r--r-- | arch/ppc/mm/mmu_decl.h | 2 |
4 files changed, 4 insertions, 4 deletions
diff --git a/arch/powerpc/mm/mem.c b/arch/powerpc/mm/mem.c index 81eb96ec13b..5402fb6b3aa 100644 --- a/arch/powerpc/mm/mem.c +++ b/arch/powerpc/mm/mem.c @@ -464,7 +464,7 @@ void update_mmu_cache(struct vm_area_struct *vma, unsigned long address, * we invalidate the TLB here, thus avoiding dcbst * misbehaviour. */ - _tlbie(address); + _tlbie(address, 0 /* 8xx doesn't care about PID */); #endif if (!PageReserved(page) && !test_bit(PG_arch_1, &page->flags)) { diff --git a/arch/powerpc/mm/mmu_decl.h b/arch/powerpc/mm/mmu_decl.h index eb3a732e91d..ebfd13dc9d1 100644 --- a/arch/powerpc/mm/mmu_decl.h +++ b/arch/powerpc/mm/mmu_decl.h @@ -56,7 +56,7 @@ extern unsigned long total_lowmem; * architectures. -- Dan */ #if defined(CONFIG_8xx) -#define flush_HPTE(X, va, pg) _tlbie(va) +#define flush_HPTE(X, va, pg) _tlbie(va, 0 /* 8xx doesn't care about PID */) #define MMU_init_hw() do { } while(0) #define mmu_mapin_ram() (0UL) diff --git a/arch/ppc/mm/init.c b/arch/ppc/mm/init.c index 390dd1995c2..dd898d32480 100644 --- a/arch/ppc/mm/init.c +++ b/arch/ppc/mm/init.c @@ -561,7 +561,7 @@ void update_mmu_cache(struct vm_area_struct *vma, unsigned long address, * That means the zeroed TLB has to be invalidated * whenever a page miss occurs. */ - _tlbie(address); + _tlbie(address, 0 /* 8xx doesn't care about PID */); #endif if (!PageReserved(page) && !test_bit(PG_arch_1, &page->flags)) { diff --git a/arch/ppc/mm/mmu_decl.h b/arch/ppc/mm/mmu_decl.h index f1d4f2109a9..b298b60c202 100644 --- a/arch/ppc/mm/mmu_decl.h +++ b/arch/ppc/mm/mmu_decl.h @@ -49,7 +49,7 @@ extern unsigned int num_tlbcam_entries; * architectures. -- Dan */ #if defined(CONFIG_8xx) -#define flush_HPTE(X, va, pg) _tlbie(va) +#define flush_HPTE(X, va, pg) _tlbie(va, 0 /* 8xx doesn't care about PID */) #define MMU_init_hw() do { } while(0) #define mmu_mapin_ram() (0UL) |