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authorEvgeniy Dushistov <dushistov@mail.ru>2010-11-09 22:46:17 +0300
committerNicolas Pitre <nico@fluxnic.net>2010-11-29 10:42:05 -0500
commit1ccb53a4f3d0bfd65889fcfe988d829633641f49 (patch)
treeaedf8ddb377bee93181ac9e5979009dbd5c83dd3 /arch
parent3561d43fd289f590fdae672e5eb831b8d5cf0bf6 (diff)
[ARM] mv78xx: wrong cpu1 window base register address
The constant DDR_WINDOW_CPU1_BASE has wrong value. Because of that mv78xx0_mbus_dram_info is not filled properly on start, and in its turn drivers, that used mv78xx0_mbus_dram_info, in my case mv643xx_eth.c, not work on second core. According to MV76100, MV78100, and MV78200 DiscoveryTM Innovation Series CPU Family Functional Specifications address should be 0x1570. Signed-off-by: Evgeniy Dushistov <dushistov@mail.ru> Acked-by: Lennert Buytenhek <buytenh@wantstofly.org> Signed-off-by: Nicolas Pitre <nico@fluxnic.net>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/mach-mv78xx0/include/mach/mv78xx0.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/mach-mv78xx0/include/mach/mv78xx0.h b/arch/arm/mach-mv78xx0/include/mach/mv78xx0.h
index 788bdace130..3eff39921d4 100644
--- a/arch/arm/mach-mv78xx0/include/mach/mv78xx0.h
+++ b/arch/arm/mach-mv78xx0/include/mach/mv78xx0.h
@@ -65,7 +65,7 @@
*/
#define DDR_VIRT_BASE (MV78XX0_REGS_VIRT_BASE | 0x00000)
#define DDR_WINDOW_CPU0_BASE (DDR_VIRT_BASE | 0x1500)
-#define DDR_WINDOW_CPU1_BASE (DDR_VIRT_BASE | 0x1700)
+#define DDR_WINDOW_CPU1_BASE (DDR_VIRT_BASE | 0x1570)
#define DEV_BUS_PHYS_BASE (MV78XX0_REGS_PHYS_BASE | 0x10000)
#define DEV_BUS_VIRT_BASE (MV78XX0_REGS_VIRT_BASE | 0x10000)