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authorHiroshi Doyu <hdoyu@nvidia.com>2013-10-30 17:17:48 -0600
committerOlof Johansson <olof@lixom.net>2013-10-30 17:38:27 -0700
commit4cca9593266d70b741ae63618ed1657f69a9f389 (patch)
tree54c83f5f61065b1299a39ad6fcd7414d1e8b5f1c /arch
parent6275a9be78e3ab584be3d863cebdfe07d35d9762 (diff)
ARM: tegra: fix Tegra114 IOMMU register address
The IOMMU node's reg property contains completely bogus values! Somehow, this had no practical effect, despite the fact the IOMMU driver appears to be writing to those registers. I suppose that since no HW modules is actually at that address, the writes simply had no effect. Note that I'm not CCing stable here, even though the problem exists as far back as v3.9, simply because this patch doesn't fix any observed issue, and I don't want to run the risk of suddenly writing to some registers and causing a regression. Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com> [swarren, wrote commit description] Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Olof Johansson <olof@lixom.net>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/boot/dts/tegra114.dtsi6
1 files changed, 3 insertions, 3 deletions
diff --git a/arch/arm/boot/dts/tegra114.dtsi b/arch/arm/boot/dts/tegra114.dtsi
index 2905145d8e5..8d42787c8ff 100644
--- a/arch/arm/boot/dts/tegra114.dtsi
+++ b/arch/arm/boot/dts/tegra114.dtsi
@@ -318,9 +318,9 @@
iommu {
compatible = "nvidia,tegra114-smmu", "nvidia,tegra30-smmu";
- reg = <0x7000f010 0x02c
- 0x7000f1f0 0x010
- 0x7000f228 0x074>;
+ reg = <0x70019010 0x02c
+ 0x700191f0 0x010
+ 0x70019228 0x074>;
nvidia,#asids = <4>;
dma-window = <0 0x40000000>;
nvidia,swgroups = <0x18659fe>;