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authorMarek Vasut <marek.vasut@gmail.com>2010-10-19 17:06:49 +0200
committerEric Miao <eric.y.miao@gmail.com>2010-12-20 23:14:09 +0800
commit59bdd133561a432c4655146e283caf85fa64c2fb (patch)
tree62e4514eff33958ab3bc7dabdea9fbd0cf3ee9d0 /arch
parent1b9169d8a0fe2b41fbbb8d152c8108190865f3cf (diff)
ARM: pxa: Add Balloon3 NAND ready check
Signed-off-by: Marek Vasut <marek.vasut@gmail.com> Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/mach-pxa/balloon3.c8
-rw-r--r--arch/arm/mach-pxa/include/mach/balloon3.h2
2 files changed, 7 insertions, 3 deletions
diff --git a/arch/arm/mach-pxa/balloon3.c b/arch/arm/mach-pxa/balloon3.c
index d4649c0e23f..ccb2d0cebcc 100644
--- a/arch/arm/mach-pxa/balloon3.c
+++ b/arch/arm/mach-pxa/balloon3.c
@@ -612,9 +612,13 @@ static void balloon3_nand_select_chip(struct mtd_info *mtd, int chip)
BALLOON3_NAND_CONTROL_REG);
}
+static int balloon3_nand_dev_ready(struct mtd_info *mtd)
+{
+ return __raw_readl(BALLOON3_NAND_STAT_REG) & BALLOON3_NAND_STAT_RNB;
+}
+
static int balloon3_nand_probe(struct platform_device *pdev)
{
- void __iomem *temp_map;
uint16_t ver;
int ret;
@@ -684,7 +688,7 @@ struct platform_nand_data balloon3_nand_pdata = {
},
.ctrl = {
.hwcontrol = 0,
- .dev_ready = 0,
+ .dev_ready = balloon3_nand_dev_ready,
.select_chip = balloon3_nand_select_chip,
.cmd_ctrl = balloon3_nand_cmd_ctl,
.probe = balloon3_nand_probe,
diff --git a/arch/arm/mach-pxa/include/mach/balloon3.h b/arch/arm/mach-pxa/include/mach/balloon3.h
index f6c81ea5148..7074e76146c 100644
--- a/arch/arm/mach-pxa/include/mach/balloon3.h
+++ b/arch/arm/mach-pxa/include/mach/balloon3.h
@@ -37,7 +37,7 @@ enum balloon3_features {
#define BALLOON3_NAND_BASE (PXA_CS4_PHYS + 0x00e00000)
#define BALLOON3_NAND_IO_REG (BALLOON3_FPGA_VIRT + 0x00e00000)
#define BALLOON3_NAND_CONTROL2_REG (BALLOON3_FPGA_VIRT + 0x00e00010)
-#define BALLOON3_NAND_STAT_REG (BALLOON3_FPGA_VIRT + 0x00e00010)
+#define BALLOON3_NAND_STAT_REG (BALLOON3_FPGA_VIRT + 0x00e00014)
#define BALLOON3_NAND_CONTROL_REG (BALLOON3_FPGA_VIRT + 0x00e00014)
/* fpga/cpld interrupt control register */