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authorMarkos Chandras <markos.chandras@imgtec.com>2014-11-14 10:05:41 +0000
committerMarkos Chandras <markos.chandras@imgtec.com>2015-02-17 15:37:26 +0000
commit6ebb496ffc7eeb309a1505bb980e6fb1499eebd7 (patch)
treec3587938d1951a67b66b7d01cb67d08134c65fd3 /arch
parent8b8aa636f02879c5e3d4228109dc5a13a934d89b (diff)
MIPS: kernel: entry.S: Add MIPS R6 related definitions
The instruction hazard barrier in the form of: jr.hb ra nop is valid on MIPS R6 as well. Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
Diffstat (limited to 'arch')
-rw-r--r--arch/mips/kernel/entry.S5
1 files changed, 3 insertions, 2 deletions
diff --git a/arch/mips/kernel/entry.S b/arch/mips/kernel/entry.S
index 4353d323f01..d5ab21c3fd1 100644
--- a/arch/mips/kernel/entry.S
+++ b/arch/mips/kernel/entry.S
@@ -158,7 +158,8 @@ syscall_exit_work:
jal syscall_trace_leave
b resume_userspace
-#if defined(CONFIG_CPU_MIPSR2) || defined(CONFIG_MIPS_MT)
+#if defined(CONFIG_CPU_MIPSR2) || defined(CONFIG_CPU_MIPSR6) || \
+ defined(CONFIG_MIPS_MT)
/*
* MIPS32R2 Instruction Hazard Barrier - must be called
@@ -171,4 +172,4 @@ LEAF(mips_ihb)
nop
END(mips_ihb)
-#endif /* CONFIG_CPU_MIPSR2 or CONFIG_MIPS_MT */
+#endif /* CONFIG_CPU_MIPSR2 or CONFIG_CPU_MIPSR6 or CONFIG_MIPS_MT */