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authorIngo Molnar <mingo@elte.hu>2008-12-25 12:48:18 +0100
committerIngo Molnar <mingo@elte.hu>2008-12-25 12:48:18 +0100
commita3eeeefbf1cd1d142c52238cc19c75d14c3bc8d5 (patch)
tree28eedba6d432e9d9d772962e6f92732aef1be065 /drivers/acpi
parent30cd324e9787ccc9a5ede59742d5409857550692 (diff)
parent7e3cbc3f774f31ecd88a51edae3d9377f60a4c00 (diff)
Merge branch 'x86/tsc' into tracing/core
Merge it to resolve this incidental conflict between the BTS fixes/cleanups and changes in x86/tsc: Conflicts: arch/x86/kernel/cpu/intel.c
Diffstat (limited to 'drivers/acpi')
-rw-r--r--drivers/acpi/processor_idle.c6
1 files changed, 3 insertions, 3 deletions
diff --git a/drivers/acpi/processor_idle.c b/drivers/acpi/processor_idle.c
index 5f8d746a9b8..38aca048e95 100644
--- a/drivers/acpi/processor_idle.c
+++ b/drivers/acpi/processor_idle.c
@@ -374,15 +374,15 @@ static int tsc_halts_in_c(int state)
{
switch (boot_cpu_data.x86_vendor) {
case X86_VENDOR_AMD:
+ case X86_VENDOR_INTEL:
/*
* AMD Fam10h TSC will tick in all
* C/P/S0/S1 states when this bit is set.
*/
- if (boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
+ if (boot_cpu_has(X86_FEATURE_NONSTOP_TSC))
return 0;
+
/*FALL THROUGH*/
- case X86_VENDOR_INTEL:
- /* Several cases known where TSC halts in C2 too */
default:
return state > ACPI_STATE_C1;
}