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authorsonic zhang <sonic.adi@gmail.com>2007-11-27 12:47:39 +0800
committerJeff Garzik <jeff@garzik.org>2007-12-01 17:35:58 -0500
commitf88c480dac88a754f84e943cb5539d59cda3c089 (patch)
tree5c2485dcab759849ecfda80d2f6b0fdc93c983b1 /drivers/ata/pata_bf54x.c
parent92d499d991ec4f5cbd00d6f33967eab9d3ee8d6c (diff)
Set proper ATA UDMA mode for bf548 according to system clock.
UDMA Mode - Frequency compatibility UDMA5 - 100 MB/s - SCLK = 133 MHz UDMA4 - 66 MB/s - SCLK >= 80 MHz UDMA3 - 44.4 MB/s - SCLK >= 50 MHz UDMA2 - 33 MB/s - SCLK >= 40 MHz Signed-off-by: Sonic Zhang <sonic.zhang@analog.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
Diffstat (limited to 'drivers/ata/pata_bf54x.c')
-rw-r--r--drivers/ata/pata_bf54x.c7
1 files changed, 7 insertions, 0 deletions
diff --git a/drivers/ata/pata_bf54x.c b/drivers/ata/pata_bf54x.c
index 81db405a544..088a41f4e65 100644
--- a/drivers/ata/pata_bf54x.c
+++ b/drivers/ata/pata_bf54x.c
@@ -1489,6 +1489,8 @@ static int __devinit bfin_atapi_probe(struct platform_device *pdev)
int board_idx = 0;
struct resource *res;
struct ata_host *host;
+ unsigned int fsclk = get_sclk();
+ int udma_mode = 5;
const struct ata_port_info *ppi[] =
{ &bfin_port_info[board_idx], NULL };
@@ -1507,6 +1509,11 @@ static int __devinit bfin_atapi_probe(struct platform_device *pdev)
if (res == NULL)
return -EINVAL;
+ while (bfin_port_info[board_idx].udma_mask>0 && udma_fsclk[udma_mode] > fsclk) {
+ udma_mode--;
+ bfin_port_info[board_idx].udma_mask >>= 1;
+ }
+
/*
* Now that that's out of the way, wire up the port..
*/