diff options
| author | Lucas De Marchi <lucas.demarchi@profusion.mobi> | 2011-03-30 22:57:33 -0300 |
|---|---|---|
| committer | Lucas De Marchi <lucas.demarchi@profusion.mobi> | 2011-03-31 11:26:23 -0300 |
| commit | 25985edcedea6396277003854657b5f3cb31a628 (patch) | |
| tree | f026e810210a2ee7290caeb737c23cb6472b7c38 /drivers/ata/sata_fsl.c | |
| parent | 6aba74f2791287ec407e0f92487a725a25908067 (diff) | |
Fix common misspellings
Fixes generated by 'codespell' and manually reviewed.
Signed-off-by: Lucas De Marchi <lucas.demarchi@profusion.mobi>
Diffstat (limited to 'drivers/ata/sata_fsl.c')
| -rw-r--r-- | drivers/ata/sata_fsl.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/ata/sata_fsl.c b/drivers/ata/sata_fsl.c index 0f91e583892..35a71d875d0 100644 --- a/drivers/ata/sata_fsl.c +++ b/drivers/ata/sata_fsl.c @@ -42,7 +42,7 @@ enum { /* * SATA-FSL host controller supports a max. of (15+1) direct PRDEs, and - * chained indirect PRDEs upto a max count of 63. + * chained indirect PRDEs up to a max count of 63. * We are allocating an array of 63 PRDEs contiguously, but PRDE#15 will * be setup as an indirect descriptor, pointing to it's next * (contiguous) PRDE. Though chained indirect PRDE arrays are @@ -907,7 +907,7 @@ static int sata_fsl_softreset(struct ata_link *link, unsigned int *class, ata_msleep(ap, 1); /* - * SATA device enters reset state after receving a Control register + * SATA device enters reset state after receiving a Control register * FIS with SRST bit asserted and it awaits another H2D Control reg. * FIS with SRST bit cleared, then the device does internal diags & * initialization, followed by indicating it's initialization status |