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| author | David Woodhouse <David.Woodhouse@intel.com> | 2009-09-20 05:55:36 -0700 |
|---|---|---|
| committer | David Woodhouse <David.Woodhouse@intel.com> | 2009-09-20 05:55:36 -0700 |
| commit | 6469f540ea37d53db089c8fea9c0c77a3d9353d4 (patch) | |
| tree | 1dc9dc077150d57f4424cae49e711b5dd6e903a1 /drivers/ata/sata_sil.c | |
| parent | 304e6d5fe294b80e6d3107f99ec241816390ebcc (diff) | |
| parent | 78f28b7c555359c67c2a0d23f7436e915329421e (diff) | |
Merge branch 'master' of git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux-2.6
Conflicts:
drivers/mtd/mtdcore.c
Merged in order that I can apply the Nomadik nand/onenand support patches.
Diffstat (limited to 'drivers/ata/sata_sil.c')
| -rw-r--r-- | drivers/ata/sata_sil.c | 13 |
1 files changed, 13 insertions, 0 deletions
diff --git a/drivers/ata/sata_sil.c b/drivers/ata/sata_sil.c index 35bd5cc7f28..3cb69d5fb81 100644 --- a/drivers/ata/sata_sil.c +++ b/drivers/ata/sata_sil.c @@ -565,6 +565,19 @@ static void sil_freeze(struct ata_port *ap) tmp |= SIL_MASK_IDE0_INT << ap->port_no; writel(tmp, mmio_base + SIL_SYSCFG); readl(mmio_base + SIL_SYSCFG); /* flush */ + + /* Ensure DMA_ENABLE is off. + * + * This is because the controller will not give us access to the + * taskfile registers while a DMA is in progress + */ + iowrite8(ioread8(ap->ioaddr.bmdma_addr) & ~SIL_DMA_ENABLE, + ap->ioaddr.bmdma_addr); + + /* According to ata_bmdma_stop, an HDMA transition requires + * on PIO cycle. But we can't read a taskfile register. + */ + ioread8(ap->ioaddr.bmdma_addr); } static void sil_thaw(struct ata_port *ap) |