diff options
| author | Linus Torvalds <torvalds@linux-foundation.org> | 2011-01-12 08:40:25 -0800 |
|---|---|---|
| committer | Linus Torvalds <torvalds@linux-foundation.org> | 2011-01-12 08:40:25 -0800 |
| commit | f878133bf022717b880d0e0995b8f91436fd605c (patch) | |
| tree | b16528611d3af337f65f8ff0ae9b90b447e345ad /drivers/char/agp/intel-agp.h | |
| parent | 1b3862798cf4390b9110e54e405646e156f47c83 (diff) | |
| parent | d15eda5c6edff4987af6f4423af0bab0c3251e74 (diff) | |
Merge branch 'drm-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/airlied/drm-2.6
* 'drm-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/airlied/drm-2.6: (39 commits)
i915/gtt: fix ordering causing DMAR errors on object teardown.
i915/gtt: fix ordering issues with status setup and DMAR
drm/i915/execbuffer: Reorder binding of objects to favour restrictions
drm/i915: If we hit OOM when allocating GTT pages, clear the aperture
drm/i915/evict: Ensure we completely cleanup on failure
drm/i915/execbuffer: Correctly clear the current object list upon EFAULT
drm/i915/debugfs: Show all objects in the gtt
drm/i915: Record AGP memory type upon error
drm/i915: Periodically flush the active lists and requests
drm/i915/gtt: Unmap the PCI pages after unbinding them from the GTT
drm/i915: Record the error batchbuffer on each ring
drm/i915: Include TLB miss overhead for computing WM
drm/i915: Propagate error from flushing the ring
drm/i915: detect & report PCH display error interrupts
drm/i915: cleanup rc6 code
drm/i915: fix rc6 enabling around suspend/resume
drm/i915: re-enable rc6 support for Ironlake+
drm/i915: Make the ring IMR handling private
drm/i915/ringbuffer: Simplify the ring irq refcounting
drm/i915/debugfs: Show the per-ring IMR
...
Diffstat (limited to 'drivers/char/agp/intel-agp.h')
| -rw-r--r-- | drivers/char/agp/intel-agp.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/char/agp/intel-agp.h b/drivers/char/agp/intel-agp.h index 010e3defd6c..c195bfeade1 100644 --- a/drivers/char/agp/intel-agp.h +++ b/drivers/char/agp/intel-agp.h @@ -94,6 +94,8 @@ #define G4x_GMCH_SIZE_VT_1_5M (0xa << 8) #define G4x_GMCH_SIZE_VT_2M (0xc << 8) +#define GFX_FLSH_CNTL 0x2170 /* 915+ */ + #define I810_DRAM_CTL 0x3000 #define I810_DRAM_ROW_0 0x00000001 #define I810_DRAM_ROW_0_SDRAM 0x00000001 |