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authorLinus Torvalds <torvalds@linux-foundation.org>2008-06-20 12:38:18 -0700
committerLinus Torvalds <torvalds@linux-foundation.org>2008-06-20 12:38:18 -0700
commit9aef85cc58f54f01bbbafdb3c87af4465f4257c0 (patch)
tree5bad4a1e733b46aa60f7af866409d3cb984d39c7 /drivers/char/drm/i915_drv.h
parentfdfe6d3d000775b50fb1adbc278ba0a34c3007c7 (diff)
parent858a3685bcf3ac199128e4aa85eaae2fb9d191b5 (diff)
Merge branch 'drm-patches' of git://git.kernel.org/pub/scm/linux/kernel/git/airlied/drm-2.6
* 'drm-patches' of git://git.kernel.org/pub/scm/linux/kernel/git/airlied/drm-2.6: (21 commits) drm: only trust core drm ioctls - driver ioctls are a mess. drm/i915: add support for Intel series 4 chipsets. drm/radeon: add hier-z registers for r300 and r500 chipsets drm/radeon: use DSTCACHE_CTLSTAT rather than RB2D_DSTCACHE_CTLSTAT drm/radeon: switch IGP gart to use radeon_write_agp_base() drm/radeon: Restore sw interrupt on resume drm/r500: add support for AGP based cards. drm/radeon: fix texture uploads with large 3d textures (bug 13980) drm/radeon: add initial r500 support. drm/radeon: init pipe setup in kernel code. drm/radeon: fixup radeon_do_engine_reset drm/radeon: fix pixcache and purge/cache flushing registers drm/radeon: write AGP_BASE_2 on chips that support it. drm/radeon: merge IGP chip setup and fixup RS400 vs RS480 support drm/radeon: IGP clean up register and magic numbers. drm/rs690: set base 2 to 0. drm/rs690: set all of gart base address. radeon: add production microcode from AMD drm: pcigart use proper pci map interfaces. drm: the sg alloc ioctl should write back the handle to userspace ...
Diffstat (limited to 'drivers/char/drm/i915_drv.h')
-rw-r--r--drivers/char/drm/i915_drv.h11
1 files changed, 9 insertions, 2 deletions
diff --git a/drivers/char/drm/i915_drv.h b/drivers/char/drm/i915_drv.h
index 1b20f7c0639..d7326d92a23 100644
--- a/drivers/char/drm/i915_drv.h
+++ b/drivers/char/drm/i915_drv.h
@@ -1112,12 +1112,19 @@ extern int i915_wait_ring(struct drm_device * dev, int n, const char *caller);
(dev)->pci_device == 0x29A2 || \
(dev)->pci_device == 0x2A02 || \
(dev)->pci_device == 0x2A12 || \
- (dev)->pci_device == 0x2A42)
+ (dev)->pci_device == 0x2A42 || \
+ (dev)->pci_device == 0x2E02 || \
+ (dev)->pci_device == 0x2E12 || \
+ (dev)->pci_device == 0x2E22)
#define IS_I965GM(dev) ((dev)->pci_device == 0x2A02)
#define IS_IGD_GM(dev) ((dev)->pci_device == 0x2A42)
+#define IS_G4X(dev) ((dev)->pci_device == 0x2E02 || \
+ (dev)->pci_device == 0x2E12 || \
+ (dev)->pci_device == 0x2E22)
+
#define IS_G33(dev) ((dev)->pci_device == 0x29C2 || \
(dev)->pci_device == 0x29B2 || \
(dev)->pci_device == 0x29D2)
@@ -1128,7 +1135,7 @@ extern int i915_wait_ring(struct drm_device * dev, int n, const char *caller);
#define IS_MOBILE(dev) (IS_I830(dev) || IS_I85X(dev) || IS_I915GM(dev) || \
IS_I945GM(dev) || IS_I965GM(dev) || IS_IGD_GM(dev))
-#define I915_NEED_GFX_HWS(dev) (IS_G33(dev) || IS_IGD_GM(dev))
+#define I915_NEED_GFX_HWS(dev) (IS_G33(dev) || IS_IGD_GM(dev) || IS_G4X(dev))
#define PRIMARY_RINGBUFFER_SIZE (128*1024)