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authorZhenyu Wang <zhenyuw@linux.intel.com>2010-11-02 17:30:46 +0800
committerChris Wilson <chris@chris-wilson.co.uk>2010-11-04 09:39:50 +0000
commit16a02cf08a2de0863daf7ebb91718d7c6bbe7f9c (patch)
tree8a4d083794272b7d7bf82aad75076a7722164b23 /drivers/char/ds1302.c
parent8d0f56708292ca5c256ee3b7187d124afee81d93 (diff)
agp/intel: fix cache control for sandybridge
This is broken from 97ef1bdd0bc75bce7b2058e9c432b6c277dcf4d3. Let's set the correct bit for LLC+MLC and LLC only. Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com> Cc: stable@kernel.org Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Diffstat (limited to 'drivers/char/ds1302.c')
0 files changed, 0 insertions, 0 deletions